Lines Matching defs:dc
198 struct dc *dc = clk_mgr_base->ctx->dc;
205 struct dmcu *dmcu = clk_mgr_base->ctx->dc->res_pool->dmcu;
210 if (dc->work_arounds.skip_clock_update || !clk_mgr->smu_present)
214 (dc->debug.force_clock_mode & 0x1)) {
222 display_count = clk_mgr_helper_get_active_display_cnt(dc, context);
230 if (dc->debug.force_min_dcfclk_mhz > 0)
231 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ?
232 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000);
252 if (dc->clk_mgr->dc_mode_softmax_enabled && safe_to_lower && !p_state_change_support) {
253 if ((new_clocks->dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) !=
254 (clk_mgr_base->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000))
264 if (dc->clk_mgr->dc_mode_softmax_enabled &&
265 new_clocks->dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)
267 dc->clk_mgr->bw_params->dc_mode_softmax_memclk);
300 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) {
424 clk_mgr_base->ctx->dc->res_pool->funcs->update_bw_bounding_box(
425 clk_mgr->base.ctx->dc, clk_mgr_base->bw_params);