Lines Matching refs:bw
183 context->bw_ctx.bw.dce.all_displays_in_sync;
185 context->bw_ctx.bw.dce.nbp_state_change_enable == false;
187 context->bw_ctx.bw.dce.cpuc_state_change_enable == false;
189 context->bw_ctx.bw.dce.cpup_state_change_enable == false;
191 context->bw_ctx.bw.dce.blackout_recovery_time_us;
205 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz
211 context->bw_ctx.bw.dce.sclk_khz);
224 = context->bw_ctx.bw.dce.sclk_deep_sleep_khz;
255 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
270 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk);