dc/bios/command_table2.c

397 	struct bp_pixel_clock_parameters *bp_params);
401 	struct bp_pixel_clock_parameters *bp_params);
437 	struct bp_pixel_clock_parameters *bp_params)
446 	if (bp->cmd_helper->clock_source_id_to_atom(bp_params->pll_id, &pll_id)
447 			&& bp->cmd_helper->controller_id_to_atom(bp_params->
473 					bp_params->encoder_object_id));
477 				bp_params->signal_type, false);
479 		clk.pixclk_100hz = cpu_to_le32(bp_params->target_pixel_clock_100hz);
484 					bp_params->color_depth);
488 				bp_params->target_pixel_clock_100hz, (int)controller_id,
489 				pll_id, bp_params->color_depth);
491 		if (bp_params->flags.FORCE_PROGRAMMING_OF_PLL)
494 		if (bp_params->flags.PROGRAM_PHY_PLL_ONLY)
497 		if (bp_params->flags.SUPPORT_YUV_420)
500 		if (bp_params->flags.SET_XTALIN_REF_SRC)
503 		if (bp_params->flags.SET_GENLOCK_REF_DIV_SRC)
506 		if (bp_params->signal_type == SIGNAL_TYPE_DVI_DUAL_LINK)
523 	struct bp_pixel_clock_parameters *bp_params)
527 		return set_pixel_clock_v7(bp, bp_params);
543 	struct bp_hw_crtc_timing_parameters *bp_params);
564 	struct bp_hw_crtc_timing_parameters *bp_params)
571 			bp_params->controller_id, &atom_controller_id))
575 	params.h_size = cpu_to_le16((uint16_t)bp_params->h_addressable);
578 			cpu_to_le16((uint16_t)(bp_params->h_total -
579 					bp_params->h_addressable));
581 	params.v_size = cpu_to_le16((uint16_t)bp_params->v_addressable);
584 			cpu_to_le16((uint16_t)(bp_params->v_total -
585 					bp_params->v_addressable));
591 			cpu_to_le16((uint16_t)(bp_params->h_sync_start -
592 					bp_params->h_addressable));
593 	params.h_syncwidth = cpu_to_le16((uint16_t)bp_params->h_sync_width);
599 			cpu_to_le16((uint16_t)(bp_params->v_sync_start -
600 					bp_params->v_addressable));
601 	params.v_syncwidth = cpu_to_le16((uint16_t)bp_params->v_sync_width);
608 	if (bp_params->flags.HSYNC_POSITIVE_POLARITY == 0)
613 	if (bp_params->flags.VSYNC_POSITIVE_POLARITY == 0)
618 	if (bp_params->flags.INTERLACE)	{
642 	if (bp_params->flags.HORZ_COUNT_BY_TWO)
857 	struct bp_set_dce_clock_parameters *bp_params);
875 	struct bp_set_dce_clock_parameters *bp_params)
886 	if (!cmd->clock_source_id_to_atom(bp_params->pll_id, &atom_pll_id) ||
887 			!cmd->dc_clock_type_to_atom(bp_params->clock_type,
894 	if (bp_params->clock_type == DCECLOCK_TYPE_DPREFCLK) {
895 		if (bp_params->flags.USE_GENLOCK_AS_SOURCE_FOR_DPREFCLK)
899 		if (bp_params->flags.USE_PCIE_AS_SOURCE_FOR_DPREFCLK)
903 		if (bp_params->flags.USE_XTALIN_AS_SOURCE_FOR_DPREFCLK)
907 		if (bp_params->flags.USE_GENERICA_AS_SOURCE_FOR_DPREFCLK)
916 				bp_params->target_clock_frequency / 10);
919 			bp_params->target_clock_frequency,\
920 			bp_params->clock_type);
924 		bp_params->target_clock_frequency = le32_to_cpu(