Lines Matching refs:params
37 #define EXEC_BIOS_CMD_TABLE(command, params)\
40 (uint32_t *)¶ms, sizeof(params)) == 0)
200 DIG_ENCODER_CONTROL_PARAMETERS_V2 params = {0};
202 bp->cmd_helper->assign_control_parameter(bp->cmd_helper, cntl, ¶ms);
204 if (EXEC_BIOS_CMD_TABLE(DIG1EncoderControl, params))
215 DIG_ENCODER_CONTROL_PARAMETERS_V2 params = {0};
217 bp->cmd_helper->assign_control_parameter(bp->cmd_helper, cntl, ¶ms);
219 if (EXEC_BIOS_CMD_TABLE(DIG2EncoderControl, params))
230 DIG_ENCODER_CONTROL_PARAMETERS_V3 params = {0};
233 params.acConfig.ucDPLinkRate = 1; /* dual link 2.7GHz */
235 params.acConfig.ucDPLinkRate = 0; /* single link 1.62GHz */
237 params.acConfig.ucDigSel = (uint8_t)(cntl->engine_id);
240 params.ucAction = bp->cmd_helper->encoder_action_to_atom(cntl->action);
241 params.usPixelClock = cpu_to_le16((uint16_t)(cntl->pixel_clock / 10));
242 params.ucEncoderMode =
246 params.ucLaneNum = (uint8_t)(cntl->lanes_number);
250 params.ucBitPerColor = PANEL_8BIT_PER_COLOR;
253 params.ucBitPerColor = PANEL_10BIT_PER_COLOR;
256 params.ucBitPerColor = PANEL_12BIT_PER_COLOR;
259 params.ucBitPerColor = PANEL_16BIT_PER_COLOR;
265 if (EXEC_BIOS_CMD_TABLE(DIGxEncoderControl, params))
276 DIG_ENCODER_CONTROL_PARAMETERS_V4 params = {0};
279 params.acConfig.ucDPLinkRate = 1; /* dual link 2.7GHz */
281 params.acConfig.ucDPLinkRate = 0; /* single link 1.62GHz */
283 params.acConfig.ucDigSel = (uint8_t)(cntl->engine_id);
286 params.ucAction = bp->cmd_helper->encoder_action_to_atom(cntl->action);
287 params.usPixelClock = cpu_to_le16((uint16_t)(cntl->pixel_clock / 10));
288 params.ucEncoderMode =
292 params.ucLaneNum = (uint8_t)(cntl->lanes_number);
296 params.ucBitPerColor = PANEL_8BIT_PER_COLOR;
299 params.ucBitPerColor = PANEL_10BIT_PER_COLOR;
302 params.ucBitPerColor = PANEL_12BIT_PER_COLOR;
305 params.ucBitPerColor = PANEL_16BIT_PER_COLOR;
311 if (EXEC_BIOS_CMD_TABLE(DIGxEncoderControl, params))
322 ENCODER_STREAM_SETUP_PARAMETERS_V5 params = {0};
324 params.ucDigId = (uint8_t)(cntl->engine_id);
325 params.ucAction = bp->cmd_helper->encoder_action_to_atom(cntl->action);
327 params.ulPixelClock = cntl->pixel_clock / 10;
328 params.ucDigMode =
332 params.ucLaneNum = (uint8_t)(cntl->lanes_number);
336 params.ucBitPerColor = PANEL_8BIT_PER_COLOR;
339 params.ucBitPerColor = PANEL_10BIT_PER_COLOR;
342 params.ucBitPerColor = PANEL_12BIT_PER_COLOR;
345 params.ucBitPerColor = PANEL_16BIT_PER_COLOR;
354 params.ulPixelClock =
355 (params.ulPixelClock * 30) / 24;
358 params.ulPixelClock =
359 (params.ulPixelClock * 36) / 24;
362 params.ulPixelClock =
363 (params.ulPixelClock * 48) / 24;
369 if (EXEC_BIOS_CMD_TABLE(DIGxEncoderControl, params))
435 DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 params;
439 memset(¶ms, 0, sizeof(params));
464 params.acConfig.fDualLinkConnector = 1;
467 params.usInitInfo =
472 params.asMode.ucLaneSel = (uint8_t)cntl->lane_select;
473 params.asMode.ucLaneSet = (uint8_t)cntl->lane_settings;
484 params.acConfig.fDualLinkConnector = 1;
489 params.usPixelClock =
495 params.usPixelClock =
504 params.acConfig.fCoherentMode = cntl->coherent;
515 params.acConfig.ucLinkSel = 1;
523 params.acConfig.ucEncoderSel = 1;
531 params.acConfig.fDPConnector = 1;
539 params.acConfig.ucTransmitterSel =
543 params.ucAction = (uint8_t)cntl->action;
545 if (EXEC_BIOS_CMD_TABLE(UNIPHYTransmitterControl, params))
556 DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 params;
564 memset(¶ms, 0, sizeof(params));
592 params.acConfig.fDualLinkConnector = 1;
596 params.usInitInfo =
601 params.asMode.ucLaneSel = (uint8_t)cntl->lane_select;
602 params.asMode.ucLaneSet = (uint8_t)cntl->lane_settings;
612 params.acConfig.fDualLinkConnector = 1;
622 params.acConfig.fDualLinkConnector = 1;
627 params.usPixelClock =
633 params.usPixelClock =
643 params.acConfig.fCoherentMode = cntl->coherent;
654 params.acConfig.ucLinkSel = 1;
662 params.acConfig.ucEncoderSel = 1;
670 params.acConfig.ucTransmitterSel =
673 params.ucLaneNum = (uint8_t)cntl->lanes_number;
675 params.acConfig.ucRefClkSource = (uint8_t)pll_id;
677 params.ucAction = (uint8_t)cntl->action;
679 if (EXEC_BIOS_CMD_TABLE(UNIPHYTransmitterControl, params))
690 DIG_TRANSMITTER_CONTROL_PARAMETERS_V4 params;
696 memset(¶ms, 0, sizeof(params));
725 params.acConfig.fDualLinkConnector = 1;
728 params.usInitInfo =
734 params.asMode.ucLaneSel = (uint8_t)(cntl->lane_select);
735 params.asMode.ucLaneSet = (uint8_t)(cntl->lane_settings);
746 params.acConfig.fDualLinkConnector = 1;
753 params.usPixelClock =
759 params.usPixelClock =
769 params.acConfig.fCoherentMode = cntl->coherent;
780 params.acConfig.ucLinkSel = 1;
788 params.acConfig.ucEncoderSel = 1;
796 params.acConfig.ucTransmitterSel =
798 params.ucLaneNum = (uint8_t)(cntl->lanes_number);
799 params.acConfig.ucRefClkSource = (uint8_t)(ref_clk_src_id);
800 params.ucAction = (uint8_t)(cntl->action);
802 if (EXEC_BIOS_CMD_TABLE(UNIPHYTransmitterControl, params))
814 DIG_TRANSMITTER_CONTROL_PARAMETERS_V1_5 params;
816 memset(¶ms, 0, sizeof(params));
817 params.ucPhyId = cmd->phy_id_to_atom(cntl->transmitter);
818 params.ucAction = (uint8_t)cntl->action;
819 params.ucLaneNum = (uint8_t)cntl->lanes_number;
820 params.ucConnObjId = (uint8_t)cntl->connector_obj_id.id;
822 params.ucDigMode =
824 params.asConfig.ucPhyClkSrcId =
827 params.asConfig.ucCoherentMode = cntl->coherent;
828 params.asConfig.ucHPDSel =
830 params.ucDigEncoderSel =
832 params.ucDPLaneSet = (uint8_t) cntl->lane_settings;
833 params.usSymClock = cpu_to_le16((uint16_t) (cntl->pixel_clock / 10));
847 params.usSymClock =
848 cpu_to_le16((le16_to_cpu(params.usSymClock) * 30) / 24);
851 params.usSymClock =
852 cpu_to_le16((le16_to_cpu(params.usSymClock) * 36) / 24);
855 params.usSymClock =
856 cpu_to_le16((le16_to_cpu(params.usSymClock) * 48) / 24);
863 if (EXEC_BIOS_CMD_TABLE(UNIPHYTransmitterControl, params))
875 DIG_TRANSMITTER_CONTROL_PARAMETERS_V1_6 params;
877 memset(¶ms, 0, sizeof(params));
878 params.ucPhyId = cmd->phy_id_to_atom(cntl->transmitter);
879 params.ucAction = (uint8_t)cntl->action;
882 params.ucDPLaneSet = (uint8_t)cntl->lane_settings;
884 params.ucDigMode = cmd->signal_type_to_atom_dig_mode(cntl->signal);
886 params.ucLaneNum = (uint8_t)cntl->lanes_number;
887 params.ucHPDSel = cmd->hpd_sel_to_atom(cntl->hpd_sel);
888 params.ucDigEncoderSel = cmd->dig_encoder_sel_to_atom(cntl->engine_id);
889 params.ucConnObjId = (uint8_t)cntl->connector_obj_id.id;
890 params.ulSymClock = cntl->pixel_clock/10;
906 params.ulSymClock =
907 cpu_to_le16((le16_to_cpu(params.ulSymClock) * 30) / 24);
910 params.ulSymClock =
911 cpu_to_le16((le16_to_cpu(params.ulSymClock) * 36) / 24);
914 params.ulSymClock =
915 cpu_to_le16((le16_to_cpu(params.ulSymClock) * 48) / 24);
925 if (EXEC_BIOS_CMD_TABLE(UNIPHYTransmitterControl, params))
979 PIXEL_CLOCK_PARAMETERS_V3 *params;
1004 params = (PIXEL_CLOCK_PARAMETERS_V3 *)&allocation.sPCLKInput;
1005 params->ucTransmitterId =
1009 params->ucEncoderMode =
1014 params->ucMiscInfo |= PIXEL_CLOCK_MISC_FORCE_PROG_PPLL;
1017 params->ucMiscInfo |= PIXEL_CLOCK_MISC_USE_ENGINE_FOR_DISPCLK;
1020 params->ucMiscInfo |= PIXEL_CLOCK_MISC_CRTC_SEL_CRTC2;
1325 ENABLE_SPREAD_SPECTRUM_ON_PPLL params;
1327 memset(¶ms, 0, sizeof(params));
1330 params.ucEnable = ATOM_ENABLE;
1332 params.ucEnable = ATOM_DISABLE;
1334 params.usSpreadSpectrumPercentage =
1336 params.ucSpreadSpectrumStep =
1338 params.ucSpreadSpectrumDelay =
1341 params.ucSpreadSpectrumRange =
1345 params.ucSpreadSpectrumType |= ATOM_EXTERNAL_SS_MASK;
1348 params.ucSpreadSpectrumType |= ATOM_SS_CENTRE_SPREAD_MODE;
1351 params.ucPpll = ATOM_PPLL1;
1353 params.ucPpll = ATOM_PPLL2;
1357 if (EXEC_BIOS_CMD_TABLE(EnableSpreadSpectrumOnPPLL, params))
1369 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V2 params;
1371 memset(¶ms, 0, sizeof(params));
1374 params.ucSpreadSpectrumType = ATOM_PPLL_SS_TYPE_V2_P1PLL;
1376 params.ucSpreadSpectrumType = ATOM_PPLL_SS_TYPE_V2_P2PLL;
1381 params.ucEnable = ATOM_ENABLE;
1383 params.usSpreadSpectrumPercentage =
1385 params.usSpreadSpectrumStep =
1389 params.ucSpreadSpectrumType |=
1393 params.ucSpreadSpectrumType |=
1399 params.usSpreadSpectrumAmount = cpu_to_le16((uint16_t)(
1407 params.ucEnable = ATOM_DISABLE;
1409 if (EXEC_BIOS_CMD_TABLE(EnableSpreadSpectrumOnPPLL, params))
1421 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 params;
1423 memset(¶ms, 0, sizeof(params));
1430 params.ucSpreadSpectrumType = ATOM_PPLL_SS_TYPE_V3_DCPLL;
1433 params.ucSpreadSpectrumType = ATOM_PPLL_SS_TYPE_V3_P1PLL;
1437 params.ucSpreadSpectrumType = ATOM_PPLL_SS_TYPE_V3_P2PLL;
1441 params.ucSpreadSpectrumType = ATOM_PPLL_SS_TYPE_V3_DCPLL;
1451 params.ucEnable = ATOM_ENABLE;
1453 params.usSpreadSpectrumAmountFrac =
1455 params.usSpreadSpectrumStep =
1459 params.ucSpreadSpectrumType |=
1462 params.ucSpreadSpectrumType |=
1468 params.usSpreadSpectrumAmount = cpu_to_le16((uint16_t)(
1476 params.ucEnable = ATOM_DISABLE;
1478 if (EXEC_BIOS_CMD_TABLE(EnableSpreadSpectrumOnPPLL, params))
1521 ADJUST_DISPLAY_PLL_PS_ALLOCATION params = { 0 };
1527 params.usPixelClock = cpu_to_le16((uint16_t)(pixel_clock_10KHz_in));
1528 params.ucTransmitterID =
1532 params.ucEncodeMode =
1536 if (EXEC_BIOS_CMD_TABLE(AdjustDisplayPll, params)) {
1541 (uint64_t)le16_to_cpu(params.usPixelClock);
1564 ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 params;
1567 memset(¶ms, 0, sizeof(params));
1571 params.sInput.usPixelClock = cpu_to_le16((uint16_t)pixel_clk_10_kHz_in);
1572 params.sInput.ucTransmitterID =
1576 params.sInput.ucEncodeMode =
1581 params.sInput.ucDispPllConfig |= DISPPLL_CONFIG_SS_ENABLE;
1584 params.sInput.ucDispPllConfig |= DISPPLL_CONFIG_DUAL_LINK;
1586 if (EXEC_BIOS_CMD_TABLE(AdjustDisplayPll, params)) {
1591 (uint64_t)le32_to_cpu(params.sOutput.ulDispPllFreq);
1603 bp_params->reference_divider = params.sOutput.ucRefDiv;
1604 bp_params->pixel_clock_post_divider = params.sOutput.ucPostDiv;
1652 DAC_ENCODER_CONTROL_PS_ALLOCATION *params,
1657 params->ucDacStandard = dac_standard;
1659 params->ucAction = ATOM_ENABLE;
1661 params->ucAction = ATOM_DISABLE;
1666 params->usPixelClock = cpu_to_le16((uint16_t)(pixel_clock / 10));
1676 DAC_ENCODER_CONTROL_PS_ALLOCATION params;
1679 ¶ms,
1684 if (EXEC_BIOS_CMD_TABLE(DAC1EncoderControl, params))
1697 DAC_ENCODER_CONTROL_PS_ALLOCATION params;
1700 ¶ms,
1705 if (EXEC_BIOS_CMD_TABLE(DAC2EncoderControl, params))
1749 DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION params;
1752 params.ucAction = ATOM_ENABLE;
1754 params.ucAction = ATOM_DISABLE;
1756 if (EXEC_BIOS_CMD_TABLE(DAC1OutputControl, params))
1766 DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION params;
1769 params.ucAction = ATOM_ENABLE;
1771 params.ucAction = ATOM_DISABLE;
1773 if (EXEC_BIOS_CMD_TABLE(DAC2OutputControl, params))
1828 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION params = {0};
1833 params.ucCRTC = atom_controller_id;
1835 params.usH_Total = cpu_to_le16((uint16_t)(bp_params->h_total));
1836 params.usH_Disp = cpu_to_le16((uint16_t)(bp_params->h_addressable));
1837 params.usH_SyncStart = cpu_to_le16((uint16_t)(bp_params->h_sync_start));
1838 params.usH_SyncWidth = cpu_to_le16((uint16_t)(bp_params->h_sync_width));
1839 params.usV_Total = cpu_to_le16((uint16_t)(bp_params->v_total));
1840 params.usV_Disp = cpu_to_le16((uint16_t)(bp_params->v_addressable));
1841 params.usV_SyncStart =
1843 params.usV_SyncWidth =
1852 params.ucOverscanRight = (uint8_t)bp_params->h_overscan_right;
1853 params.ucOverscanLeft = (uint8_t)bp_params->h_overscan_left;
1854 params.ucOverscanBottom = (uint8_t)bp_params->v_overscan_bottom;
1855 params.ucOverscanTop = (uint8_t)bp_params->v_overscan_top;
1858 params.susModeMiscInfo.usAccess =
1859 cpu_to_le16(le16_to_cpu(params.susModeMiscInfo.usAccess) | ATOM_HSYNC_POLARITY);
1862 params.susModeMiscInfo.usAccess =
1863 cpu_to_le16(le16_to_cpu(params.susModeMiscInfo.usAccess) | ATOM_VSYNC_POLARITY);
1866 params.susModeMiscInfo.usAccess =
1867 cpu_to_le16(le16_to_cpu(params.susModeMiscInfo.usAccess) | ATOM_INTERLACE);
1882 params.usV_SyncStart =
1887 params.susModeMiscInfo.usAccess =
1888 cpu_to_le16(le16_to_cpu(params.susModeMiscInfo.usAccess) | ATOM_DOUBLE_CLOCK_MODE);
1890 if (EXEC_BIOS_CMD_TABLE(SetCRTC_Timing, params))
1901 SET_CRTC_USING_DTD_TIMING_PARAMETERS params = {0};
1906 params.ucCRTC = atom_controller_id;
1909 params.usH_Size = cpu_to_le16((uint16_t)bp_params->h_addressable);
1911 params.usH_Blanking_Time =
1914 params.usV_Size = cpu_to_le16((uint16_t)bp_params->v_addressable);
1916 params.usV_Blanking_Time =
1921 params.usH_SyncOffset =
1923 params.usH_SyncWidth = cpu_to_le16((uint16_t)bp_params->h_sync_width);
1927 params.usV_SyncOffset =
1929 params.usV_SyncWidth = cpu_to_le16((uint16_t)bp_params->v_sync_width);
1937 params.susModeMiscInfo.usAccess =
1938 cpu_to_le16(le16_to_cpu(params.susModeMiscInfo.usAccess) | ATOM_HSYNC_POLARITY);
1941 params.susModeMiscInfo.usAccess =
1942 cpu_to_le16(le16_to_cpu(params.susModeMiscInfo.usAccess) | ATOM_VSYNC_POLARITY);
1945 params.susModeMiscInfo.usAccess =
1946 cpu_to_le16(le16_to_cpu(params.susModeMiscInfo.usAccess) | ATOM_INTERLACE);
1963 le16_add_cpu(¶ms.usV_SyncOffset, 1);
1968 params.susModeMiscInfo.usAccess =
1969 cpu_to_le16(le16_to_cpu(params.susModeMiscInfo.usAccess) | ATOM_DOUBLE_CLOCK_MODE);
1971 if (EXEC_BIOS_CMD_TABLE(SetCRTC_UsingDTDTiming, params))
2010 ENABLE_CRTC_PARAMETERS params = {0};
2014 params.ucCRTC = id;
2019 params.ucEnable = ATOM_ENABLE;
2021 params.ucEnable = ATOM_DISABLE;
2023 if (EXEC_BIOS_CMD_TABLE(EnableCRTC, params))
2060 ENABLE_CRTC_PARAMETERS params = {0};
2064 params.ucCRTC = id;
2067 params.ucEnable = ATOM_ENABLE;
2069 params.ucEnable = ATOM_DISABLE;
2071 if (EXEC_BIOS_CMD_TABLE(EnableCRTCMemReq, params))
2118 SET_PIXEL_CLOCK_PS_ALLOCATION_V5 params;
2121 memset(¶ms, 0, sizeof(params));
2129 params.sPCLKInput.ucPpll = (uint8_t) atom_pll_id;
2130 params.sPCLKInput.usPixelClock =
2132 params.sPCLKInput.ucCRTC = (uint8_t) ATOM_CRTC_INVALID;
2135 params.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC;
2137 if (EXEC_BIOS_CMD_TABLE(SetPixelClock, params))
2149 SET_PIXEL_CLOCK_PS_ALLOCATION_V6 params;
2152 memset(¶ms, 0, sizeof(params));
2161 params.sPCLKInput.ucPpll = (uint8_t)atom_pll_id;
2162 params.sPCLKInput.ulDispEngClkFreq =
2166 params.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC;
2169 params.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_DPREFCLK_BYPASS;
2171 if (EXEC_BIOS_CMD_TABLE(SetPixelClock, params)) {
2175 (uint32_t)(le32_to_cpu(params.sPCLKInput.ulDispEngClkFreq) * 10);
2215 EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION_V3 params;
2220 memset(¶ms, 0, sizeof(params));
2222 cntl_params = ¶ms.sExtEncoder;
2303 if (EXEC_BIOS_CMD_TABLE(ExternalEncoderControl, params))
2345 ENABLE_DISP_POWER_GATING_PS_ALLOCATION params = {0};
2349 params.ucDispPipeId = atom_crtc_id;
2353 params.ucEnable =
2356 if (EXEC_BIOS_CMD_TABLE(EnableDispPowerGating, params))
2393 SET_DCE_CLOCK_PS_ALLOCATION_V2_1 params;
2398 memset(¶ms, 0, sizeof(params));
2404 params.asParam.ucDCEClkSrc = atom_pll_id;
2405 params.asParam.ucDCEClkType = atom_clock_type;
2409 params.asParam.ucDCEClkFlag |= DCE_CLOCK_FLAG_PLL_REFCLK_SRC_GENLK;
2412 params.asParam.ucDCEClkFlag |= DCE_CLOCK_FLAG_PLL_REFCLK_SRC_PCIE;
2415 params.asParam.ucDCEClkFlag |= DCE_CLOCK_FLAG_PLL_REFCLK_SRC_XTALIN;
2418 params.asParam.ucDCEClkFlag |= DCE_CLOCK_FLAG_PLL_REFCLK_SRC_GENERICA;
2423 params.asParam.ulDCEClkFreq = cpu_to_le32(bp_params->target_clock_frequency / 10);
2425 if (EXEC_BIOS_CMD_TABLE(SetDCEClock, params)) {
2427 bp_params->target_clock_frequency = le32_to_cpu(params.asParam.ulDCEClkFreq) * 10;