display/amdgpu_dm/amdgpu_dm.c

1298 static void mmhub_read_system_context(struct amdgpu_device *adev, struct dc_phy_addr_space_config *pa_config)
1306 	memset(pa_config, 0, sizeof(*pa_config));
1356 	pa_config->system_aperture.start_addr = (uint64_t)logical_addr_low << 18;
1357 	pa_config->system_aperture.end_addr = (uint64_t)logical_addr_high << 18;
1359 	pa_config->system_aperture.agp_base = (uint64_t)agp_base << 24;
1360 	pa_config->system_aperture.agp_bot = (uint64_t)agp_bot << 24;
1361 	pa_config->system_aperture.agp_top = (uint64_t)agp_top << 24;
1363 	pa_config->system_aperture.fb_base = adev->gmc.fb_start;
1364 	pa_config->system_aperture.fb_offset = adev->vm_manager.vram_base_offset;
1365 	pa_config->system_aperture.fb_top = adev->gmc.fb_end;
1367 	pa_config->gart_config.page_table_start_addr = page_table_start.quad_part << 12;
1368 	pa_config->gart_config.page_table_end_addr = page_table_end.quad_part << 12;
1369 	pa_config->gart_config.page_table_base_addr = page_table_base.quad_part;
1371 	pa_config->is_hvm_enabled = adev->mode_info.gpu_vm_support;
1810 		struct dc_phy_addr_space_config pa_config;
1812 		mmhub_read_system_context(adev, &pa_config);
1815 		dc_setup_system_context(adev->dm.dc, &pa_config);