Lines Matching refs:aconnector
173 static bool is_freesync_video_mode(const struct drm_display_mode *mode, struct amdgpu_dm_connector *aconnector);
194 static void update_subconnector_property(struct amdgpu_dm_connector *aconnector)
196 struct dc_link *link = aconnector->dc_link;
197 struct drm_connector *connector = &aconnector->base;
203 if (aconnector->dc_sink)
237 static void handle_hpd_irq_helper(struct amdgpu_dm_connector *aconnector);
739 struct amdgpu_dm_connector *aconnector;
770 aconnector = to_amdgpu_dm_connector(connector);
771 if (link && aconnector->dc_link == link) {
780 hpd_aconnector = aconnector;
984 struct amdgpu_dm_connector *aconnector;
997 aconnector = to_amdgpu_dm_connector(connector);
998 if (aconnector->audio_inst != port)
1376 struct amdgpu_dm_connector *aconnector,
1379 struct drm_connector *connector = &aconnector->base;
1382 aconnector->base.force = force_state;
1385 mutex_lock(&aconnector->hpd_lock);
1387 mutex_unlock(&aconnector->hpd_lock);
1393 struct amdgpu_dm_connector *aconnector;
1403 aconnector = offload_work->offload_wq->aconnector;
1405 if (!aconnector) {
1406 DRM_ERROR("Can't retrieve aconnector in hpd_rx_irq_offload_work");
1410 adev = drm_to_adev(aconnector->base.dev);
1411 dc_link = aconnector->dc_link;
1413 mutex_lock(&aconnector->hpd_lock);
1416 mutex_unlock(&aconnector->hpd_lock);
1426 dm_handle_mst_sideband_msg_ready_event(&aconnector->mst_mgr, DOWN_OR_UP_MSG_RDY_EVENT);
1437 if (aconnector->timing_changed) {
1439 force_connector_state(aconnector, DRM_FORCE_OFF);
1441 force_connector_state(aconnector, DRM_FORCE_UNSPECIFIED);
2324 struct amdgpu_dm_connector *aconnector;
2335 aconnector = to_amdgpu_dm_connector(connector);
2336 if (aconnector->dc_link->type == dc_connection_mst_branch &&
2337 aconnector->mst_mgr.aux) {
2338 DRM_DEBUG_DRIVER("DM_MST: starting TM on aconnector: %p [id: %d]\n",
2339 aconnector,
2340 aconnector->base.base.id);
2342 ret = drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, true);
2345 aconnector->dc_link->type =
2347 ret = dm_helpers_dp_mst_stop_top_mgr(aconnector->dc_link->ctx,
2348 aconnector->dc_link);
2456 struct amdgpu_dm_connector *aconnector;
2467 aconnector = to_amdgpu_dm_connector(connector);
2468 if (aconnector->dc_link->type != dc_connection_mst_branch ||
2469 aconnector->mst_root)
2472 mgr = &aconnector->mst_mgr;
2481 try_to_configure_aux_timeout(aconnector->dc_link->ddc, LINK_AUX_DEFAULT_LTTPR_TIMEOUT_PERIOD);
2482 if (!dp_is_lttpr_present(aconnector->dc_link))
2483 try_to_configure_aux_timeout(aconnector->dc_link->ddc, LINK_AUX_DEFAULT_TIMEOUT_PERIOD);
2880 struct amdgpu_dm_connector *aconnector;
2998 aconnector = to_amdgpu_dm_connector(connector);
3000 if (!aconnector->dc_link)
3007 if (aconnector && aconnector->mst_root)
3010 mutex_lock(&aconnector->hpd_lock);
3011 if (!dc_link_detect_connection_type(aconnector->dc_link, &new_connection_type))
3014 if (aconnector->base.force && new_connection_type == dc_connection_none) {
3015 emulated_link_detect(aconnector->dc_link);
3018 dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD);
3022 if (aconnector->fake_enable && aconnector->dc_link->local_sink)
3023 aconnector->fake_enable = false;
3025 if (aconnector->dc_sink)
3026 dc_sink_release(aconnector->dc_sink);
3027 aconnector->dc_sink = NULL;
3028 amdgpu_dm_update_connector_after_detect(aconnector);
3029 mutex_unlock(&aconnector->hpd_lock);
3072 aconnector = to_amdgpu_dm_connector(connector);
3073 if (aconnector->dc_link->type != dc_connection_mst_branch ||
3074 aconnector->mst_root)
3077 ret = drm_dp_mst_topology_mgr_resume(&aconnector->mst_mgr, true);
3080 dm_helpers_dp_mst_stop_top_mgr(aconnector->dc_link->ctx,
3081 aconnector->dc_link);
3155 static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
3162 if (aconnector->bl_idx == -1 ||
3163 aconnector->dc_link->connector_signal != SIGNAL_TYPE_EDP)
3166 conn_base = &aconnector->base;
3169 caps = &adev->dm.backlight_caps[aconnector->bl_idx];
3170 caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
3198 struct amdgpu_dm_connector *aconnector)
3200 struct drm_connector *connector = &aconnector->base;
3205 if (aconnector->mst_mgr.mst_state == true)
3208 sink = aconnector->dc_link->local_sink;
3217 if (aconnector->base.force != DRM_FORCE_UNSPECIFIED
3218 && aconnector->dc_em_sink) {
3227 if (aconnector->dc_sink) {
3235 dc_sink_release(aconnector->dc_sink);
3237 aconnector->dc_sink = sink;
3238 dc_sink_retain(aconnector->dc_sink);
3240 aconnector->edid);
3243 if (!aconnector->dc_sink) {
3244 aconnector->dc_sink = aconnector->dc_em_sink;
3245 dc_sink_retain(aconnector->dc_sink);
3265 if (aconnector->dc_sink == sink) {
3271 aconnector->connector_id);
3278 aconnector->connector_id, aconnector->dc_sink, sink);
3291 if (aconnector->dc_sink) {
3293 dc_sink_release(aconnector->dc_sink);
3296 aconnector->dc_sink = sink;
3297 dc_sink_retain(aconnector->dc_sink);
3299 aconnector->edid = NULL;
3300 if (aconnector->dc_link->aux_mode) {
3302 &aconnector->dm_dp_aux.aux);
3305 aconnector->edid =
3308 if (aconnector->dc_link->aux_mode)
3309 drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux,
3310 aconnector->edid);
3313 if (!aconnector->timing_requested) {
3314 aconnector->timing_requested =
3316 if (!aconnector->timing_requested)
3318 "failed to create aconnector->requested_timing\n");
3321 drm_connector_update_edid_property(connector, aconnector->edid);
3322 amdgpu_dm_update_freesync_caps(connector, aconnector->edid);
3323 update_connector_ext_caps(aconnector);
3325 drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux);
3328 aconnector->num_modes = 0;
3329 dc_sink_release(aconnector->dc_sink);
3330 aconnector->dc_sink = NULL;
3331 aconnector->edid = NULL;
3332 kfree(aconnector->timing_requested);
3333 aconnector->timing_requested = NULL;
3341 update_subconnector_property(aconnector);
3347 static void handle_hpd_irq_helper(struct amdgpu_dm_connector *aconnector)
3349 struct drm_connector *connector = &aconnector->base;
3363 mutex_lock(&aconnector->hpd_lock);
3366 hdcp_reset_display(adev->dm.hdcp_workqueue, aconnector->dc_link->link_index);
3369 if (aconnector->fake_enable)
3370 aconnector->fake_enable = false;
3372 aconnector->timing_changed = false;
3374 if (!dc_link_detect_connection_type(aconnector->dc_link, &new_connection_type))
3377 if (aconnector->base.force && new_connection_type == dc_connection_none) {
3378 emulated_link_detect(aconnector->dc_link);
3384 if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
3388 ret = dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD);
3391 amdgpu_dm_update_connector_after_detect(aconnector);
3397 if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
3401 mutex_unlock(&aconnector->hpd_lock);
3407 struct amdgpu_dm_connector *aconnector = (struct amdgpu_dm_connector *)param;
3409 handle_hpd_irq_helper(aconnector);
3434 struct amdgpu_dm_connector *aconnector = (struct amdgpu_dm_connector *)param;
3435 struct drm_connector *connector = &aconnector->base;
3437 struct dc_link *dc_link = aconnector->dc_link;
3438 bool is_mst_root_connector = aconnector->mst_mgr.mst_state;
3458 mutex_lock(&aconnector->hpd_lock);
3518 if (aconnector->base.force && new_connection_type == dc_connection_none) {
3521 if (aconnector->fake_enable)
3522 aconnector->fake_enable = false;
3524 amdgpu_dm_update_connector_after_detect(aconnector);
3540 if (aconnector->fake_enable)
3541 aconnector->fake_enable = false;
3543 amdgpu_dm_update_connector_after_detect(aconnector);
3555 hdcp_handle_cpirq(adev->dm.hdcp_workqueue, aconnector->base.index);
3559 drm_dp_cec_irq(&aconnector->dm_dp_aux.aux);
3561 mutex_unlock(&aconnector->hpd_lock);
3568 struct amdgpu_dm_connector *aconnector;
3589 aconnector = to_amdgpu_dm_connector(connector);
3590 dc_link = aconnector->dc_link;
3598 (void *) aconnector);
3609 (void *) aconnector);
4319 amdgpu_dm_register_backlight_device(struct amdgpu_dm_connector *aconnector)
4321 struct drm_device *drm = aconnector->base.dev;
4326 if (aconnector->bl_idx == -1)
4341 drm->primary->index + aconnector->bl_idx);
4343 dm->backlight_dev[aconnector->bl_idx] =
4344 backlight_device_register(bl_name, aconnector->base.kdev, dm,
4347 if (IS_ERR(dm->backlight_dev[aconnector->bl_idx])) {
4349 dm->backlight_dev[aconnector->bl_idx] = NULL;
4396 struct amdgpu_dm_connector *aconnector)
4398 struct dc_link *link = aconnector->dc_link;
4410 aconnector->bl_idx = bl_idx;
4417 update_connector_ext_caps(aconnector);
4434 struct amdgpu_dm_connector *aconnector = NULL;
4610 aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
4611 if (!aconnector)
4623 if (amdgpu_dm_connector_init(dm, aconnector, i, aencoder)) {
4629 dm->hpd_rx_offload_wq[aconnector->base.index].aconnector =
4630 aconnector;
4635 if (aconnector->base.force && new_connection_type == dc_connection_none) {
4637 amdgpu_dm_update_connector_after_detect(aconnector);
4646 amdgpu_dm_update_connector_after_detect(aconnector);
4647 setup_backlight_device(dm, aconnector);
4651 if (amdgpu_dm_set_replay_caps(link, aconnector))
4664 amdgpu_set_panel_orientation(&aconnector->base);
4738 kfree(aconnector);
5656 struct amdgpu_dm_connector *aconnector = NULL;
5661 aconnector = to_amdgpu_dm_connector(connector);
5675 && aconnector
5676 && aconnector->force_yuv420_output)
5711 if (aconnector && is_freesync_video_mode(mode_in, aconnector)) {
5947 get_highest_refresh_rate_mode(struct amdgpu_dm_connector *aconnector,
5953 &aconnector->base.probed_modes :
5954 &aconnector->base.modes;
5956 if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
5959 if (aconnector->freesync_vid_base.clock != 0)
5960 return &aconnector->freesync_vid_base;
5973 &aconnector->base.modes, struct drm_display_mode, head);
5998 drm_mode_copy(&aconnector->freesync_vid_base, m_pref);
6003 struct amdgpu_dm_connector *aconnector)
6008 high_mode = get_highest_refresh_rate_mode(aconnector, false);
6029 static void update_dsc_caps(struct amdgpu_dm_connector *aconnector,
6036 if (aconnector->dc_link && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT ||
6040 dc_dsc_parse_dsc_dpcd(aconnector->dc_link->ctx->dc,
6041 aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,
6042 aconnector->dc_link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw,
6048 static void apply_dsc_policy_for_edp(struct amdgpu_dm_connector *aconnector,
6080 dc_link_get_highest_encoding_format(aconnector->dc_link),
6089 dc_link_get_highest_encoding_format(aconnector->dc_link),
6104 dc_link_get_highest_encoding_format(aconnector->dc_link),
6112 static void apply_dsc_policy_for_stream(struct amdgpu_dm_connector *aconnector,
6116 struct drm_connector *drm_connector = &aconnector->base;
6128 link_bandwidth_kbps = dc_link_bandwidth_kbps(aconnector->dc_link,
6129 dc_link_get_link_cap(aconnector->dc_link));
6133 aconnector->dsc_settings.dsc_force_enable == DSC_CLK_FORCE_ENABLE);
6135 if (aconnector->dc_link && sink->sink_signal == SIGNAL_TYPE_EDP &&
6136 !aconnector->dc_link->panel_config.dsc.disable_dsc_edp &&
6137 dc->caps.edp_dsc_support && aconnector->dsc_settings.dsc_force_enable != DSC_CLK_FORCE_DISABLE) {
6139 apply_dsc_policy_for_edp(aconnector, sink, stream, dsc_caps, max_dsc_target_bpp_limit_override);
6141 } else if (aconnector->dc_link && sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT) {
6143 if (dc_dsc_compute_config(aconnector->dc_link->ctx->dc->res_pool->dscs[0],
6148 dc_link_get_highest_encoding_format(aconnector->dc_link),
6155 dc_link_get_highest_encoding_format(aconnector->dc_link));
6162 if (dc_dsc_compute_config(aconnector->dc_link->ctx->dc->res_pool->dscs[0],
6167 dc_link_get_highest_encoding_format(aconnector->dc_link),
6177 if (aconnector->dsc_settings.dsc_force_enable == DSC_CLK_FORCE_ENABLE)
6180 if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_num_slices_h)
6181 stream->timing.dsc_cfg.num_slices_h = aconnector->dsc_settings.dsc_num_slices_h;
6183 if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_num_slices_v)
6184 stream->timing.dsc_cfg.num_slices_v = aconnector->dsc_settings.dsc_num_slices_v;
6186 if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_bits_per_pixel)
6187 stream->timing.dsc_cfg.bits_per_pixel = aconnector->dsc_settings.dsc_bits_per_pixel;
6197 struct amdgpu_dm_connector *aconnector = NULL;
6224 aconnector = NULL;
6225 aconnector = to_amdgpu_dm_connector(connector);
6226 link = aconnector->dc_link;
6236 if (!aconnector || !aconnector->dc_sink) {
6242 sink = aconnector->dc_sink;
6254 stream->dm_stream_context = aconnector;
6282 } else if (aconnector) {
6284 is_freesync_video_mode(&mode, aconnector);
6286 freesync_mode = get_highest_refresh_rate_mode(aconnector, false);
6316 if (!aconnector)
6319 if (aconnector->timing_changed) {
6320 drm_dbg(aconnector->base.dev,
6323 aconnector->timing_requested->display_color_depth);
6324 stream->timing = *aconnector->timing_requested;
6328 update_dsc_caps(aconnector, sink, stream, &dsc_caps);
6329 if (aconnector->dsc_settings.dsc_force_enable != DSC_CLK_FORCE_DISABLE && dsc_caps.is_dsc_supported)
6330 apply_dsc_policy_for_stream(aconnector, sink, stream, &dsc_caps);
6357 aconnector->psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;
6370 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
6379 if (aconnector->base.force == DRM_FORCE_UNSPECIFIED &&
6380 !aconnector->fake_enable)
6381 connected = (aconnector->dc_sink != NULL);
6383 connected = (aconnector->base.force == DRM_FORCE_ON ||
6384 aconnector->base.force == DRM_FORCE_ON_DIGITAL);
6386 update_subconnector_property(aconnector);
6567 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
6575 if (aconnector->mst_mgr.dev)
6576 drm_dp_mst_topology_mgr_destroy(&aconnector->mst_mgr);
6578 if (aconnector->bl_idx != -1) {
6579 backlight_device_unregister(dm->backlight_dev[aconnector->bl_idx]);
6580 dm->backlight_dev[aconnector->bl_idx] = NULL;
6583 if (aconnector->dc_em_sink)
6584 dc_sink_release(aconnector->dc_em_sink);
6585 aconnector->dc_em_sink = NULL;
6586 if (aconnector->dc_sink)
6587 dc_sink_release(aconnector->dc_sink);
6588 aconnector->dc_sink = NULL;
6590 drm_dp_cec_unregister_connector(&aconnector->dm_dp_aux.aux);
6593 if (aconnector->i2c) {
6594 i2c_del_adapter(&aconnector->i2c->base);
6595 kfree(aconnector->i2c);
6597 kfree(aconnector->dm_dp_aux.aux.name);
6693 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
6694 struct dc_link *dc_link = aconnector->dc_link;
6695 struct dc_sink *dc_em_sink = aconnector->dc_em_sink;
6700 ddc = &aconnector->dm_dp_aux.aux.ddc;
6702 ddc = &aconnector->i2c->base;
6716 aconnector->edid = edid;
6748 static void create_eml_sink(struct amdgpu_dm_connector *aconnector)
6750 struct drm_connector *connector = &aconnector->base;
6751 struct dc_link *dc_link = aconnector->dc_link;
6753 .link = aconnector->dc_link,
6760 ddc = &aconnector->dm_dp_aux.aux.ddc;
6762 ddc = &aconnector->i2c->base;
6779 aconnector->edid = edid;
6781 aconnector->dc_em_sink = dc_link_add_remote_sink(
6782 aconnector->dc_link,
6787 if (aconnector->base.force == DRM_FORCE_ON) {
6788 aconnector->dc_sink = aconnector->dc_link->local_sink ?
6789 aconnector->dc_link->local_sink :
6790 aconnector->dc_em_sink;
6791 dc_sink_retain(aconnector->dc_sink);
6795 static void handle_edid_mgmt(struct amdgpu_dm_connector *aconnector)
6797 struct dc_link *link = (struct dc_link *)aconnector->dc_link;
6808 create_eml_sink(aconnector);
6875 create_validate_stream_for_sink(struct amdgpu_dm_connector *aconnector,
6880 struct drm_connector *connector = &aconnector->base;
6896 if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
6901 dc_result = dm_dp_mst_is_port_support_mode(aconnector, stream);
6921 if (dc_result == DC_FAIL_ENC_VALIDATE && !aconnector->force_yuv420_output) {
6924 aconnector->force_yuv420_output = true;
6925 stream = create_validate_stream_for_sink(aconnector, drm_mode,
6927 aconnector->force_yuv420_output = false;
6940 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
6950 if (aconnector->base.force != DRM_FORCE_UNSPECIFIED &&
6951 !aconnector->dc_em_sink)
6952 handle_edid_mgmt(aconnector);
6956 if (dc_sink == NULL && aconnector->base.force != DRM_FORCE_ON_DIGITAL &&
6957 aconnector->base.force != DRM_FORCE_ON) {
6964 stream = create_validate_stream_for_sink(aconnector, mode,
7151 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
7161 if (!aconnector->mst_output_port)
7164 mst_port = aconnector->mst_output_port;
7165 mst_mgr = &aconnector->mst_root->mst_mgr;
7174 mst_state->pbn_div.full = dfixed_const(dm_mst_get_pbn_divider(aconnector->mst_root->dc_link));
7180 aconnector->force_yuv420_output;
7211 struct amdgpu_dm_connector *aconnector;
7221 aconnector = to_amdgpu_dm_connector(connector);
7223 if (!aconnector->mst_output_port)
7236 if ((struct amdgpu_dm_connector *)stream->dm_stream_context == aconnector)
7248 if (vars[j].aconnector == aconnector) {
7263 ret = drm_dp_mst_atomic_enable_dsc(state, aconnector->mst_output_port,
7271 vcpi = drm_dp_mst_atomic_enable_dsc(state, aconnector->mst_output_port, pbn, true);
7495 static bool is_duplicate_mode(struct amdgpu_dm_connector *aconnector,
7500 list_for_each_entry(m, &aconnector->base.probed_modes, head) {
7508 static uint add_fs_modes(struct amdgpu_dm_connector *aconnector)
7538 m = get_highest_refresh_rate_mode(aconnector, true);
7549 if (common_rates[i] < aconnector->min_vfreq * 1000 ||
7550 common_rates[i] > aconnector->max_vfreq * 1000)
7564 new_mode = drm_mode_duplicate(aconnector->base.dev, m);
7574 if (!is_duplicate_mode(aconnector, new_mode)) {
7575 drm_mode_probed_add(&aconnector->base, new_mode);
7578 drm_mode_destroy(aconnector->base.dev, new_mode);
7633 struct amdgpu_dm_connector *aconnector,
7644 if (aconnector->base.funcs->reset)
7645 aconnector->base.funcs->reset(&aconnector->base);
7647 aconnector->connector_id = link_index;
7648 aconnector->bl_idx = -1;
7649 aconnector->dc_link = link;
7650 aconnector->base.interlace_allowed = false;
7651 aconnector->base.doublescan_allowed = false;
7652 aconnector->base.stereo_allowed = false;
7653 aconnector->base.dpms = DRM_MODE_DPMS_OFF;
7654 aconnector->hpd.hpd = AMDGPU_HPD_NONE; /* not used */
7655 aconnector->audio_inst = -1;
7656 aconnector->pack_sdp_v1_3 = false;
7657 aconnector->as_type = ADAPTIVE_SYNC_TYPE_NONE;
7658 memset(&aconnector->vsdb_info, 0, sizeof(aconnector->vsdb_info));
7659 mutex_init(&aconnector->hpd_lock);
7660 mutex_init(&aconnector->handle_mst_msg_ready);
7668 aconnector->base.polled = DRM_CONNECTOR_POLL_HPD;
7669 aconnector->base.ycbcr_420_allowed =
7673 aconnector->base.polled = DRM_CONNECTOR_POLL_HPD;
7677 aconnector->base.ycbcr_420_allowed =
7681 aconnector->base.polled = DRM_CONNECTOR_POLL_HPD;
7687 drm_object_attach_property(&aconnector->base.base,
7691 drm_object_attach_property(&aconnector->base.base,
7694 drm_object_attach_property(&aconnector->base.base,
7697 drm_object_attach_property(&aconnector->base.base,
7701 if (!aconnector->mst_root)
7702 drm_connector_attach_max_bpc_property(&aconnector->base, 8, 16);
7704 aconnector->base.state->max_bpc = 16;
7705 aconnector->base.state->max_requested_bpc = aconnector->base.state->max_bpc;
7709 drm_connector_attach_content_type_property(&aconnector->base);
7713 if (!drm_mode_create_hdmi_colorspace_property(&aconnector->base, supported_colorspaces))
7714 drm_connector_attach_colorspace_property(&aconnector->base);
7715 } else if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !aconnector->mst_root) ||
7717 if (!drm_mode_create_dp_colorspace_property(&aconnector->base, supported_colorspaces))
7718 drm_connector_attach_colorspace_property(&aconnector->base);
7724 drm_connector_attach_hdr_output_metadata_property(&aconnector->base);
7726 if (!aconnector->mst_root)
7727 drm_connector_attach_vrr_capable_property(&aconnector->base);
7730 drm_connector_attach_content_protection_property(&aconnector->base, true);
7806 * dc_link which will be represented by this aconnector.
7809 struct amdgpu_dm_connector *aconnector,
7820 link->priv = aconnector;
7829 aconnector->i2c = i2c;
7841 &aconnector->base,
7848 aconnector->connector_id = -1;
7853 &aconnector->base,
7858 aconnector,
7864 &aconnector->base, &aencoder->base);
7868 amdgpu_dm_initialize_dp_connector(dm, aconnector, link->link_index);
7873 aconnector->i2c = NULL;
8001 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
8081 connector->dpms == DRM_MODE_DPMS_ON && aconnector->dc_sink != NULL) {
8770 struct amdgpu_dm_connector *aconnector;
8801 aconnector = to_amdgpu_dm_connector(connector);
8804 inst = aconnector->audio_inst;
8805 aconnector->audio_inst = -1;
8836 aconnector = to_amdgpu_dm_connector(connector);
8840 aconnector->audio_inst = inst;
8959 * aconnector as needed
8972 * dc_sink is NULL in this case on aconnector.
9187 struct amdgpu_dm_connector *aconnector;
9192 aconnector = to_amdgpu_dm_connector(connector);
9207 if (aconnector->dc_sink) {
9208 if (aconnector->dc_sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
9209 aconnector->dc_sink->sink_signal != SIGNAL_TYPE_NONE) {
9211 aconnector->dc_sink->edid_caps.display_name);
9243 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
9260 hdcp_reset_display(adev->dm.hdcp_workqueue, aconnector->dc_link->link_index);
9282 if (aconnector->dc_link && aconnector->dc_sink &&
9283 aconnector->dc_link->type == dc_connection_mst_branch) {
9286 &hdcp_work[aconnector->dc_link->link_index];
9301 adev->dm.hdcp_workqueue, aconnector->dc_link->link_index, aconnector,
9615 struct amdgpu_dm_connector *aconnector;
9622 aconnector = to_amdgpu_dm_connector(connector);
9624 if (!aconnector->dc_sink || !connector->state || !connector->encoder)
9640 if (acrtc_state->stream->sink != aconnector->dc_sink)
9641 dm_force_atomic_commit(&aconnector->base);
9700 struct amdgpu_dm_connector *aconnector;
9708 aconnector = to_amdgpu_dm_connector(new_con_state->base.connector);
9711 vrefresh >= aconnector->min_vfreq &&
9712 vrefresh <= aconnector->max_vfreq;
9718 config.min_refresh_in_uhz = aconnector->min_vfreq * 1000000;
9719 config.max_refresh_in_uhz = aconnector->max_vfreq * 1000000;
9810 struct amdgpu_dm_connector *aconnector = NULL;
9821 aconnector = to_amdgpu_dm_connector(connector);
9842 new_stream = create_validate_stream_for_sink(aconnector,
9938 } else if (amdgpu_freesync_vid_mode && aconnector &&
9940 aconnector)) {
9943 high_mode = get_highest_refresh_rate_mode(aconnector, false);
10551 struct amdgpu_dm_connector *aconnector = NULL;
10564 aconnector = to_amdgpu_dm_connector(connector);
10565 if (!aconnector->mst_output_port || !aconnector->mst_root)
10566 aconnector = NULL;
10571 if (!aconnector)
10574 return drm_dp_mst_add_affected_dsc_crtcs(state, &aconnector->mst_root->mst_mgr);
10877 struct amdgpu_dm_connector *aconnector;
10885 aconnector = to_amdgpu_dm_connector(connector);
10886 link_coding_cap = dc_link_dp_mst_decide_link_encoding_format(aconnector->dc_link);
11171 static bool parse_edid_cea(struct amdgpu_dm_connector *aconnector,
11175 struct amdgpu_device *adev = drm_to_adev(aconnector->base.dev);
11187 static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector,
11222 static int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconnector,
11248 valid_vsdb_found = parse_edid_cea(aconnector, edid_ext, EDID_LENGTH, vsdb_info);