Lines Matching refs:uint32_t
32 uint32_t reserved1 : 8; /* < reserved */
33 uint32_t opcode : 8; /* < IT opcode */
34 uint32_t count : 14;/* < Number of DWORDS - 1 in the
37 uint32_t type : 2; /* < packet identifier
41 uint32_t u32All;
59 uint32_t ordinal1;
64 uint32_t vmid_mask:16;
65 uint32_t unmap_latency:8;
66 uint32_t reserved1:5;
69 uint32_t ordinal2;
72 uint32_t queue_mask_lo;
73 uint32_t queue_mask_hi;
74 uint32_t gws_mask_lo;
75 uint32_t gws_mask_hi;
79 uint32_t oac_mask:16;
80 uint32_t reserved2:16;
82 uint32_t ordinal7;
87 uint32_t gds_heap_base:6;
88 uint32_t reserved3:5;
89 uint32_t gds_heap_size:6;
90 uint32_t reserved4:15;
92 uint32_t ordinal8;
106 uint32_t ordinal1;
111 uint32_t reserved1:2;
112 uint32_t ib_base_lo:30;
114 uint32_t ordinal2;
119 uint32_t ib_base_hi:16;
120 uint32_t reserved2:16;
122 uint32_t ordinal3;
127 uint32_t ib_size:20;
128 uint32_t chain:1;
129 uint32_t offload_polling:1;
130 uint32_t reserved2:1;
131 uint32_t valid:1;
132 uint32_t process_cnt:4;
133 uint32_t reserved3:4;
135 uint32_t ordinal4;
149 uint32_t ordinal1;
154 uint32_t pasid:16;
155 uint32_t reserved1:8;
156 uint32_t diq_enable:1;
157 uint32_t process_quantum:7;
159 uint32_t ordinal2;
164 uint32_t page_table_base:28;
165 uint32_t reserved3:4;
167 uint32_t ordinal3;
170 uint32_t reserved;
172 uint32_t sh_mem_bases;
173 uint32_t sh_mem_config;
174 uint32_t sh_mem_ape1_base;
175 uint32_t sh_mem_ape1_limit;
177 uint32_t sh_hidden_private_base_vmid;
179 uint32_t reserved2;
180 uint32_t reserved3;
182 uint32_t gds_addr_lo;
183 uint32_t gds_addr_hi;
187 uint32_t num_gws:6;
188 uint32_t reserved4:2;
189 uint32_t num_oac:4;
190 uint32_t reserved5:4;
191 uint32_t gds_size:6;
192 uint32_t num_queues:10;
194 uint32_t ordinal10;
197 uint32_t completion_signal_lo;
198 uint32_t completion_signal_hi;
230 uint32_t ordinal1;
235 uint32_t reserved1:4;
237 uint32_t reserved2:15;
239 uint32_t reserved3:2;
241 uint32_t num_queues:3;
243 uint32_t ordinal2;
248 uint32_t reserved3:1;
249 uint32_t check_disable:1;
250 uint32_t doorbell_offset:21;
251 uint32_t reserved4:3;
252 uint32_t queue:6;
254 uint32_t ordinal3;
257 uint32_t mqd_addr_lo;
258 uint32_t mqd_addr_hi;
259 uint32_t wptr_addr_lo;
260 uint32_t wptr_addr_hi;
290 uint32_t ordinal1;
295 uint32_t context_id:28;
300 uint32_t ordinal2;
305 uint32_t pasid:16;
306 uint32_t reserved1:16;
309 uint32_t reserved2:2;
310 uint32_t doorbell_offset:21;
311 uint32_t reserved3:2;
313 uint32_t reserved4:4;
315 uint32_t ordinal3;
318 uint32_t addr_lo;
319 uint32_t addr_hi;
320 uint32_t data_lo;
321 uint32_t data_hi;
352 uint32_t ordinal1;
358 uint32_t reserved1:2;
360 uint32_t reserved2:20;
362 uint32_t num_queues:3;
364 uint32_t ordinal2;
369 uint32_t pasid:16;
370 uint32_t reserved3:16;
373 uint32_t reserved4:2;
374 uint32_t doorbell_offset0:21;
375 uint32_t reserved5:9;
377 uint32_t ordinal3;
382 uint32_t reserved6:2;
383 uint32_t doorbell_offset1:21;
384 uint32_t reserved7:9;
386 uint32_t ordinal4;
391 uint32_t reserved8:2;
392 uint32_t doorbell_offset2:21;
393 uint32_t reserved9:9;
395 uint32_t ordinal5;
400 uint32_t reserved10:2;
401 uint32_t doorbell_offset3:21;
402 uint32_t reserved11:9;
404 uint32_t ordinal6;