Lines Matching refs:uint32_t
32 uint32_t reserved1 : 8; /* < reserved */
33 uint32_t opcode : 8; /* < IT opcode */
34 uint32_t count : 14;/* < number of DWORDs - 1 in the
37 uint32_t type : 2; /* < packet identifier.
41 uint32_t u32All;
59 uint32_t ordinal1;
64 uint32_t vmid_mask:16;
65 uint32_t unmap_latency:8;
66 uint32_t reserved1:5;
69 uint32_t ordinal2;
72 uint32_t queue_mask_lo;
73 uint32_t queue_mask_hi;
74 uint32_t gws_mask_lo;
75 uint32_t gws_mask_hi;
79 uint32_t oac_mask:16;
80 uint32_t reserved2:16;
82 uint32_t ordinal7;
87 uint32_t gds_heap_base:10;
88 uint32_t reserved3:1;
89 uint32_t gds_heap_size:10;
90 uint32_t reserved4:11;
92 uint32_t ordinal8;
106 uint32_t ordinal1;
111 uint32_t reserved1:2;
112 uint32_t ib_base_lo:30;
114 uint32_t ordinal2;
117 uint32_t ib_base_hi;
121 uint32_t ib_size:20;
122 uint32_t chain:1;
123 uint32_t offload_polling:1;
124 uint32_t chained_runlist_idle_disable:1;
125 uint32_t valid:1;
126 uint32_t process_cnt:4;
127 uint32_t reserved3:4;
129 uint32_t ordinal4;
143 uint32_t ordinal1;
148 uint32_t pasid:16;
149 uint32_t reserved1:2;
150 uint32_t debug_vmid:4;
151 uint32_t new_debug:1;
152 uint32_t reserved2:1;
153 uint32_t diq_enable:1;
154 uint32_t process_quantum:7;
156 uint32_t ordinal2;
159 uint32_t vm_context_page_table_base_addr_lo32;
161 uint32_t vm_context_page_table_base_addr_hi32;
163 uint32_t sh_mem_bases;
165 uint32_t sh_mem_config;
167 uint32_t sq_shader_tba_lo;
169 uint32_t sq_shader_tba_hi;
171 uint32_t sq_shader_tma_lo;
173 uint32_t sq_shader_tma_hi;
175 uint32_t reserved6;
177 uint32_t gds_addr_lo;
179 uint32_t gds_addr_hi;
183 uint32_t num_gws:7;
184 uint32_t sdma_enable:1;
185 uint32_t num_oac:4;
186 uint32_t gds_size_hi:4;
187 uint32_t gds_size:6;
188 uint32_t num_queues:10;
190 uint32_t ordinal14;
193 uint32_t completion_signal_lo;
195 uint32_t completion_signal_hi;
209 uint32_t ordinal1;
212 uint32_t reserved1;
214 uint32_t vm_context_cntl;
216 uint32_t reserved2;
218 uint32_t vm_context_page_table_end_addr_lo32;
220 uint32_t vm_context_page_table_end_addr_hi32;
222 uint32_t vm_context_page_table_start_addr_lo32;
224 uint32_t vm_context_page_table_start_addr_hi32;
226 uint32_t reserved3;
228 uint32_t reserved4;
230 uint32_t reserved5;
232 uint32_t reserved6;
234 uint32_t reserved7;
236 uint32_t reserved8;
238 uint32_t completion_signal_lo32;
240 uint32_t completion_signal_hi32;
276 uint32_t ordinal1;
281 uint32_t reserved1:2;
284 uint32_t reserved5:6;
285 uint32_t gws_control_queue:1;
286 uint32_t reserved2:8;
288 uint32_t reserved3:2;
290 uint32_t num_queues:3;
292 uint32_t ordinal2;
297 uint32_t reserved3:1;
298 uint32_t check_disable:1;
299 uint32_t doorbell_offset:26;
300 uint32_t reserved4:4;
302 uint32_t ordinal3;
305 uint32_t mqd_addr_lo;
306 uint32_t mqd_addr_hi;
307 uint32_t wptr_addr_lo;
308 uint32_t wptr_addr_hi;
338 uint32_t ordinal1;
343 uint32_t context_id:28;
347 uint32_t ordinal2;
352 uint32_t pasid:16;
353 uint32_t reserved1:16;
356 uint32_t reserved2:2;
357 uint32_t doorbell_offset:26;
359 uint32_t reserved3:1;
361 uint32_t ordinal3;
364 uint32_t addr_lo;
365 uint32_t addr_hi;
366 uint32_t data_lo;
367 uint32_t data_hi;
403 uint32_t ordinal1;
411 uint32_t reserved2:20;
413 uint32_t num_queues:3;
415 uint32_t ordinal2;
420 uint32_t pasid:16;
421 uint32_t reserved3:16;
424 uint32_t reserved4:2;
425 uint32_t doorbell_offset0:26;
428 uint32_t ordinal3;
433 uint32_t reserved6:2;
434 uint32_t doorbell_offset1:26;
435 uint32_t reserved7:4;
437 uint32_t ordinal4;
442 uint32_t reserved8:2;
443 uint32_t doorbell_offset2:26;
444 uint32_t reserved9:4;
446 uint32_t ordinal5;
451 uint32_t reserved10:2;
452 uint32_t doorbell_offset3:26;
453 uint32_t reserved11:4;
455 uint32_t ordinal6;
521 uint32_t reserved3:1;
522 uint32_t tc_nc_action_ena:1;
523 uint32_t tc_wc_action_ena:1;
524 uint32_t tc_md_action_ena:1;
525 uint32_t reserved4:3;
527 uint32_t reserved5:2;
529 uint32_t reserved6:2;
536 uint32_t reserved7:16;
538 uint32_t reserved8:6;
540 uint32_t reserved9:2;
548 uint32_t reserved10:2;
552 uint32_t reserved11:3;
553 uint32_t address_lo_64b:29;
555 uint32_t reserved12;
560 uint32_t address_hi;
561 uint32_t reserved13;
562 uint32_t ordinal5;
566 uint32_t data_lo;
567 uint32_t cmp_data_lo;
569 uint32_t dw_offset:16;
570 uint32_t num_dwords:16;
572 uint32_t reserved14;
573 uint32_t ordinal6;
577 uint32_t data_hi;
578 uint32_t cmp_data_hi;
579 uint32_t reserved15;
580 uint32_t reserved16;
581 uint32_t ordinal7;
584 uint32_t int_ctxid;
647 uint32_t reserved7;
649 uint32_t data;