Lines Matching refs:v2
494 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:128*2
517 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256*2
534 v_mov_b32 v2, 0x0 //Set of SGPRs for TCP store
535 s_mov_b32 m0, 0x0 //Next lane of v2 to write to
565 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
608 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
611 v_mov_b32 v2, 0x0
629 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1
799 v_movrels_b32 v2, v2 //v2 = v[2+m0]
814 v_movrels_b32 v2, v2 //v2 = v[2+m0]
819 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:128*2
844 v_movrels_b32 v2, v2 //v2 = v[2+m0]
859 v_movrels_b32 v2, v2 //v2 = v[2+m0]
864 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256*2
1022 buffer_load_dword v2, v0, s_restore_buf_rsrc0, s_restore_mem_offset slc:1 glc:1 offset:128*2
1027 v_movreld_b32 v2, v2
1037 buffer_load_dword v2, v0, s_restore_buf_rsrc0, s_restore_mem_offset_save slc:1 glc:1 offset:128*2
1056 buffer_load_dword v2, v0, s_restore_buf_rsrc0, s_restore_mem_offset slc:1 glc:1 offset:256*2
1061 v_movreld_b32 v2, v2
1094 buffer_load_dword v2, v0, s_restore_buf_rsrc0, s_restore_mem_offset_save slc:1 glc:1 offset:256*2
1245 v_writelane_b32 v2, s, m0
1261 v_writelane_b32 v2, s[sgpr_idx], ttmp13
1278 v_writelane_b32 v2, s[sgpr_idx], ttmp13