Lines Matching refs:WREG32_SOC15_UMSCH
73 WREG32_SOC15_UMSCH(regUMSCH_MES_RESET_CTRL, data);
80 WREG32_SOC15_UMSCH(regVCN_MES_CNTL, data);
86 WREG32_SOC15_UMSCH(regVCN_MES_IC_BASE_CNTL, data);
88 WREG32_SOC15_UMSCH(regVCN_MES_INTR_ROUTINE_START,
90 WREG32_SOC15_UMSCH(regVCN_MES_INTR_ROUTINE_START_HI,
93 WREG32_SOC15_UMSCH(regVCN_MES_PRGRM_CNTR_START,
95 WREG32_SOC15_UMSCH(regVCN_MES_PRGRM_CNTR_START_HI,
98 WREG32_SOC15_UMSCH(regVCN_MES_LOCAL_INSTR_BASE_LO, 0);
99 WREG32_SOC15_UMSCH(regVCN_MES_LOCAL_INSTR_BASE_HI, 0);
102 WREG32_SOC15_UMSCH(regVCN_MES_LOCAL_INSTR_MASK_LO, lower_32_bits(data));
103 WREG32_SOC15_UMSCH(regVCN_MES_LOCAL_INSTR_MASK_HI, upper_32_bits(data));
107 WREG32_SOC15_UMSCH(regVCN_MES_IC_BASE_LO, lower_32_bits(data));
108 WREG32_SOC15_UMSCH(regVCN_MES_IC_BASE_HI, upper_32_bits(data));
110 WREG32_SOC15_UMSCH(regVCN_MES_MIBOUND_LO, 0x1FFFFF);
112 WREG32_SOC15_UMSCH(regVCN_MES_LOCAL_BASE0_LO,
114 WREG32_SOC15_UMSCH(regVCN_MES_LOCAL_BASE0_HI,
117 WREG32_SOC15_UMSCH(regVCN_MES_LOCAL_MASK0_LO,
119 WREG32_SOC15_UMSCH(regVCN_MES_LOCAL_MASK0_HI,
124 WREG32_SOC15_UMSCH(regVCN_MES_DC_BASE_LO, lower_32_bits(data));
125 WREG32_SOC15_UMSCH(regVCN_MES_DC_BASE_HI, upper_32_bits(data));
127 WREG32_SOC15_UMSCH(regVCN_MES_MDBOUND_LO, 0x3FFFF);
132 WREG32_SOC15_UMSCH(regUVD_UMSCH_FORCE, data);
137 WREG32_SOC15_UMSCH(regVCN_MES_IC_OP_CNTL, data);
141 WREG32_SOC15_UMSCH(regVCN_MES_IC_OP_CNTL, data);
143 WREG32_SOC15_UMSCH(regVCN_MES_GP0_LO, 0);
144 WREG32_SOC15_UMSCH(regVCN_MES_GP0_HI, 0);
146 WREG32_SOC15_UMSCH(regVCN_MES_GP1_LO, 0);
147 WREG32_SOC15_UMSCH(regVCN_MES_GP1_HI, 0);
154 WREG32_SOC15_UMSCH(regVCN_MES_CNTL, data);