Lines Matching defs:ih
67 adev->irq.ih.enabled = true;
87 adev->irq.ih.enabled = false;
88 adev->irq.ih.rptr = 0;
105 struct amdgpu_ih_ring *ih = &adev->irq.ih;
123 WREG32(mmIH_RB_BASE, ih->gpu_addr >> 8);
125 rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);
138 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));
139 WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);
146 if (adev->irq.ih.use_doorbell) {
148 OFFSET, adev->irq.ih.doorbell_index);
184 * @ih: IH ring buffer to fetch wptr
193 struct amdgpu_ih_ring *ih)
197 wptr = le32_to_cpu(*ih->wptr_cpu);
216 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask);
217 ih->rptr = (wptr + 16) & ih->ptr_mask;
229 return (wptr & ih->ptr_mask);
236 * @ih: IH ring buffer to decode
243 struct amdgpu_ih_ring *ih,
247 u32 ring_index = ih->rptr >> 2;
250 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]);
251 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]);
252 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]);
253 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
263 ih->rptr += 16;
270 * @ih: IH ring buffer to set rptr
275 struct amdgpu_ih_ring *ih)
277 if (ih->use_doorbell) {
279 *ih->rptr_cpu = ih->rptr;
280 WDOORBELL32(ih->doorbell_index, ih->rptr);
282 WREG32(mmIH_RB_RPTR, ih->rptr);
305 r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, true);
309 adev->irq.ih.use_doorbell = true;
310 adev->irq.ih.doorbell_index = adev->doorbell_index.ih;