Lines Matching defs:adev
31 static void nbio_v7_7_remap_hdp_registers(struct amdgpu_device *adev)
34 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL);
36 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL);
39 static u32 nbio_v7_7_get_rev_id(struct amdgpu_device *adev)
50 static void nbio_v7_7_mc_access_enable(struct amdgpu_device *adev, bool enable)
60 static u32 nbio_v7_7_get_memsize(struct amdgpu_device *adev)
65 static void nbio_v7_7_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
88 static void nbio_v7_7_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
108 static void nbio_v7_7_enable_doorbell_aperture(struct amdgpu_device *adev,
120 static void nbio_v7_7_enable_doorbell_selfring_aperture(struct amdgpu_device *adev,
135 lower_32_bits(adev->doorbell.base));
138 upper_32_bits(adev->doorbell.base));
146 static void nbio_v7_7_ih_doorbell_range(struct amdgpu_device *adev,
169 static void nbio_v7_7_ih_control(struct amdgpu_device *adev)
175 adev->dummy_page_addr >> 8);
192 static u32 nbio_v7_7_get_hdp_flush_req_offset(struct amdgpu_device *adev)
197 static u32 nbio_v7_7_get_hdp_flush_done_offset(struct amdgpu_device *adev)
202 static u32 nbio_v7_7_get_pcie_index_offset(struct amdgpu_device *adev)
207 static u32 nbio_v7_7_get_pcie_data_offset(struct amdgpu_device *adev)
212 static u32 nbio_v7_7_get_pcie_port_index_offset(struct amdgpu_device *adev)
217 static u32 nbio_v7_7_get_pcie_port_data_offset(struct amdgpu_device *adev)
237 static void nbio_v7_7_init_registers(struct amdgpu_device *adev)
252 static void nbio_v7_7_update_medium_grain_clock_gating(struct amdgpu_device *adev,
257 if (!(adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG))
281 static void nbio_v7_7_update_medium_grain_light_sleep(struct amdgpu_device *adev,
286 if (!(adev->cg_flags & AMD_CG_SUPPORT_BIF_LS))
311 static void nbio_v7_7_get_clockgating_state(struct amdgpu_device *adev,