amd/amdgpu/nbio_v2_3.c

232 	uint32_t def, data;
237 	def = data = RREG32_PCIE(smnCPM_CONTROL);
254 	if (def != data)
261 	uint32_t def, data;
266 	def = data = RREG32_PCIE(smnPCIE_CNTL2);
277 	if (def != data)
334 	uint32_t def, data;
336 	def = data = RREG32_PCIE(smnPCIE_CONFIG_CNTL);
340 	if (def != data)
355 	uint32_t def, data;
357 	def = data = RREG32_PCIE(smnPCIE_LC_CNTL);
380 	if (def != data)
387 	uint32_t def, data;
391 	def = data = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP2);
393 	if (def != data)
396 	def = data = RREG32_PCIE(smnRCC_EP_DEV0_0_EP_PCIE_TX_LTR_CNTL);
398 	if (def != data)
401 	def = data = RREG32_PCIE(smnBIF_CFG_DEV0_EPF0_DEVICE_CNTL2);
403 	if (def != data)
411 	uint32_t def, data;
413 	def = data = RREG32_PCIE(smnPCIE_LC_CNTL);
417 	if (def != data)
420 	def = data = RREG32_PCIE(smnPCIE_LC_CNTL7);
422 	if (def != data)
425 	def = data = RREG32_PCIE(smnNBIF_MGCG_CTRL_LCLK);
427 	if (def != data)
430 	def = data = RREG32_PCIE(smnPCIE_LC_CNTL3);
432 	if (def != data)
435 	def = data = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP3);
438 	if (def != data)
441 	def = data = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP5);
443 	if (def != data)
446 	def = data = RREG32_PCIE(smnBIF_CFG_DEV0_EPF0_DEVICE_CNTL2);
448 	if (def != data)
453 	def = data = RREG32_PCIE(smnPSWUSP0_PCIE_LC_CNTL2);
457 	if (def != data)
460 	def = data = RREG32_PCIE(smnPCIE_LC_CNTL6);
463 	if (def != data)
471 	def = data = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP3);
474 	if (def != data)
477 	def = data = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP5);
479 	if (def != data)
482 	def = data = RREG32_PCIE(smnPCIE_LC_CNTL);
489 	if (def != data)
492 	def = data = RREG32_PCIE(smnPCIE_LC_CNTL3);
494 	if (def != data)