amd/amdgpu/jpeg_v5_0_0.c

35 static void jpeg_v5_0_0_set_dec_ring_funcs(struct amdgpu_device *adev);
36 static void jpeg_v5_0_0_set_irq_funcs(struct amdgpu_device *adev);
49 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
51 	adev->jpeg.num_jpeg_inst = 1;
52 	adev->jpeg.num_jpeg_rings = 1;
54 	jpeg_v5_0_0_set_dec_ring_funcs(adev);
55 	jpeg_v5_0_0_set_irq_funcs(adev);
69 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
74 	r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN,
75 		VCN_4_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq);
79 	r = amdgpu_jpeg_sw_init(adev);
83 	r = amdgpu_jpeg_resume(adev);
87 	ring = adev->jpeg.inst->ring_dec;
89 	ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 1;
93 	r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, 0,
98 	adev->jpeg.internal.jpeg_pitch[0] = regUVD_JPEG_PITCH_INTERNAL_OFFSET;
99 	adev->jpeg.inst->external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_PITCH);
113 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
116 	r = amdgpu_jpeg_suspend(adev);
120 	r = amdgpu_jpeg_sw_fini(adev);
133 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
134 	struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
137 	adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
138 			(adev->doorbell_index.vcn.vcn_ring0_1 << 1), 0);
148 	DRM_DEV_INFO(adev->dev, "JPEG decode initialized successfully.\n");
162 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
164 	cancel_delayed_work_sync(&adev->vcn.idle_work);
166 	if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
168 		jpeg_v5_0_0_set_powergating_state(adev, AMD_PG_STATE_GATE);
182 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
185 	r = jpeg_v5_0_0_hw_fini(adev);
189 	r = amdgpu_jpeg_suspend(adev);
203 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
206 	r = amdgpu_jpeg_resume(adev);
210 	r = jpeg_v5_0_0_hw_init(adev);
215 static void jpeg_v5_0_0_disable_clock_gating(struct amdgpu_device *adev)
227 static void jpeg_v5_0_0_enable_clock_gating(struct amdgpu_device *adev)
244 static int jpeg_v5_0_0_disable_static_power_gating(struct amdgpu_device *adev)
264 static int jpeg_v5_0_0_enable_static_power_gating(struct amdgpu_device *adev)
271 	if (adev->pg_flags & AMD_PG_SUPPORT_JPEG) {
285  * @adev: amdgpu_device pointer
289 static int jpeg_v5_0_0_start(struct amdgpu_device *adev)
291 	struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
294 	if (adev->pm.dpm_enabled)
295 		amdgpu_dpm_enable_jpeg(adev, true);
298 	r = jpeg_v5_0_0_disable_static_power_gating(adev);
303 	jpeg_v5_0_0_disable_clock_gating(adev);
307 		adev->gfx.config.gb_addr_config);
337  * @adev: amdgpu_device pointer
341 static int jpeg_v5_0_0_stop(struct amdgpu_device *adev)
350 	jpeg_v5_0_0_enable_clock_gating(adev);
353 	r = jpeg_v5_0_0_enable_static_power_gating(adev);
357 	if (adev->pm.dpm_enabled)
358 		amdgpu_dpm_enable_jpeg(adev, false);
372 	struct amdgpu_device *adev = ring->adev;
386 	struct amdgpu_device *adev = ring->adev;
403 	struct amdgpu_device *adev = ring->adev;
415 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
427 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
437 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
443 		jpeg_v5_0_0_enable_clock_gating(adev);
445 		jpeg_v5_0_0_disable_clock_gating(adev);
454 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
457 	if (state == adev->jpeg.cur_state)
461 		ret = jpeg_v5_0_0_stop(adev);
463 		ret = jpeg_v5_0_0_start(adev);
466 		adev->jpeg.cur_state = state;
471 static int jpeg_v5_0_0_set_interrupt_state(struct amdgpu_device *adev,
479 static int jpeg_v5_0_0_process_interrupt(struct amdgpu_device *adev,
487 		amdgpu_fence_process(adev->jpeg.inst->ring_dec);
490 		DRM_DEV_ERROR(adev->dev, "Unhandled interrupt: %d %d\n",
549 static void jpeg_v5_0_0_set_dec_ring_funcs(struct amdgpu_device *adev)
551 	adev->jpeg.inst->ring_dec->funcs = &jpeg_v5_0_0_dec_ring_vm_funcs;
552 	DRM_DEV_INFO(adev->dev, "JPEG decode is enabled in VM mode\n");
560 static void jpeg_v5_0_0_set_irq_funcs(struct amdgpu_device *adev)
562 	adev->jpeg.inst->irq.num_types = 1;
563 	adev->jpeg.inst->irq.funcs = &jpeg_v5_0_0_irq_funcs;