amd/amdgpu/jpeg_v4_0_5.c

74 		adev->jpeg.num_jpeg_inst = 1;
77 		adev->jpeg.num_jpeg_inst = 2;
86 	adev->jpeg.num_jpeg_rings = 1;
107 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
108 		if (adev->jpeg.harvest_config & (1 << i))
113 				VCN_4_0__SRCID__JPEG_DECODE, &adev->jpeg.inst[i].irq);
119 			VCN_4_0__SRCID_DJPEG0_POISON, &adev->jpeg.inst[i].irq);
125 			VCN_4_0__SRCID_EJPEG0_POISON, &adev->jpeg.inst[i].irq);
138 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
139 		if (adev->jpeg.harvest_config & (1 << i))
142 		ring = adev->jpeg.inst[i].ring_dec;
147 		r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst[i].irq,
152 		adev->jpeg.internal.jpeg_pitch[0] = regUVD_JPEG_PITCH_INTERNAL_OFFSET;
153 		adev->jpeg.inst[i].external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, i, regUVD_JPEG_PITCH);
198 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
199 		if (adev->jpeg.harvest_config & (1 << i))
202 		ring = adev->jpeg.inst[i].ring_dec;
228 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
229 		if (adev->jpeg.harvest_config & (1 << i))
233 			if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
399 	struct amdgpu_ring *ring = adev->jpeg.inst[inst_idx].ring_dec;
421 		adev->jpeg.inst[inst_idx].dpg_sram_curr_addr =
422 					(uint32_t *)adev->jpeg.inst[inst_idx].dpg_sram_cpu_addr;
485 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
486 		if (adev->jpeg.harvest_config & (1 << i))
489 		ring = adev->jpeg.inst[i].ring_dec;
499 			jpeg_v4_0_5_start_dpg_mode(adev, i, adev->jpeg.indirect_sram);
551 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
552 		if (adev->jpeg.harvest_config & (1 << i))
633 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
634 		if (adev->jpeg.harvest_config & (1 << i))
649 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
650 		if (adev->jpeg.harvest_config & (1 << i))
668 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
669 		if (adev->jpeg.harvest_config & (1 << i))
692 		adev->jpeg.cur_state = AMD_PG_STATE_UNGATE;
696 	if (state == adev->jpeg.cur_state)
705 		adev->jpeg.cur_state = state;
732 		amdgpu_fence_process(adev->jpeg.inst[ip_instance].ring_dec);
802 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
803 		if (adev->jpeg.harvest_config & (1 << i))
806 		adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v4_0_5_dec_ring_vm_funcs;
807 		adev->jpeg.inst[i].ring_dec->me = i;
820 	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
821 		if (adev->jpeg.harvest_config & (1 << i))
824 		adev->jpeg.inst[i].irq.num_types = 1;
825 		adev->jpeg.inst[i].irq.funcs = &jpeg_v4_0_5_irq_funcs;