Lines Matching refs:tmp
188 uint32_t tmp;
191 tmp = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL);
193 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1);
194 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, 3);
195 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL,
197 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL,
199 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL,
202 WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);
207 uint32_t tmp;
214 tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL);
215 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_CACHE, 1);
216 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0);
217 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL,
220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL,
222 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0);
223 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);
224 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, IDENTITY_MODE_FRAGMENT_SIZE, 0);
225 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, tmp);
227 tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2);
228 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
229 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
230 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, tmp);
232 tmp = mmGCVM_L2_CNTL3_DEFAULT;
234 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 12);
235 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3,
238 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 9);
239 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3,
242 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, tmp);
244 tmp = mmGCVM_L2_CNTL4_DEFAULT;
245 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 0);
246 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 0);
247 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL4, tmp);
249 tmp = mmGCVM_L2_CNTL5_DEFAULT;
250 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL5, L2_CACHE_SMALLK_FRAGMENT_SIZE, 0);
251 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL5, tmp);
256 uint32_t tmp;
258 tmp = RREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL);
259 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1);
260 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0);
261 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL,
263 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL, tmp);
287 uint32_t tmp;
290 tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);
291 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1);
292 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH,
294 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
296 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
298 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
300 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
302 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
304 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
306 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
308 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
312 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
316 i * hub->ctx_distance, tmp);
329 hub->vm_cntx_cntl = tmp;
364 u32 tmp;
373 tmp = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL);
374 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 0);
375 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL,
377 WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);
395 u32 tmp;
397 tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);
398 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
400 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
402 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
404 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
406 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
409 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
411 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
413 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
415 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
417 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
419 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
422 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
424 tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
427 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp);