amd/amdgpu/gfx_v11_0.c

185 	/* Q_sel:0, vmid:0, vidmem: 1, engine:0, num_Q:1*/
186 	amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */
217 	amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */
248 	amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */
732 	/* init spm vmid with 0xf */
1669 		/* Enable trap for each kfd vmid. */
1689 	int vmid;
1697 	for (vmid = 1; vmid < 16; vmid++) {
1698 		WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_BASE, 2 * vmid, 0);
1699 		WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_SIZE, 2 * vmid, 0);
1700 		WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, vmid, 0);
1701 		WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, vmid, 0);
3271 	/* set the RB to use vmid 0 */
3641 	/* set up gfx_hqd_vimd with 0x0 to indicate the ring buffer's vmid */
3817 	/* set MQD vmid to 0 */
3871 	/* set the vmid for the queue */
3943 	/* set MQD vmid to 0 */
3986 	/* set the vmid for the queue */
4683 					   uint32_t vmid,
4692 				    SOC15_REG_OFFSET(GC, 0, regGDS_VMID0_BASE) + 2 * vmid,
4697 				    SOC15_REG_OFFSET(GC, 0, regGDS_VMID0_SIZE) + 2 * vmid,
4702 				    SOC15_REG_OFFSET(GC, 0, regGDS_GWS_VMID0) + vmid,
4707 				    SOC15_REG_OFFSET(GC, 0, regGDS_OA_VMID0) + vmid,
5031 static void gfx_v11_0_update_spm_vmid(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned vmid)
5040 	data |= (vmid & RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK) << RLC_SPM_MC_CNTL__RLC_SPM_VMID__SHIFT;
5311 	unsigned vmid = AMDGPU_JOB_GET_VMID(job);
5318 	control |= ib->length_dw | (vmid << 24);
5326 		if (vmid)
5332 		/* inherit vmid from mqd */
5351 	unsigned vmid = AMDGPU_JOB_GET_VMID(job);
5352 	u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24);
5355 		/* inherit vmid from mqd */
5446 					 unsigned vmid, uint64_t pd_addr)
5451 		amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
5534 					   int vmid)
5597 			  PACKET3_SET_Q_PREEMPTION_MODE_IB_VMID(vmid) : 0);
5605 		uint64_t token = shadow_va ^ csa_va ^ gds_va ^ vmid;
5786 					 unsigned vmid)
5794 	value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid);