amd/amdgpu/gfx_v10_0.c

3508 	amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask));	/* queue mask lo */
3509 	amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask));	/* queue mask hi */
3542 			  PACKET3_MAP_QUEUES_QUEUE(ring->queue) |
3545 			  PACKET3_MAP_QUEUES_QUEUE_TYPE(0) | /*queue_type: normal compute queue */
4432 				   int me, int pipe, int queue)
4442 	ring->queue = queue;
4452 	sprintf(ring->name, "gfx_%d.%d.%d", ring->me, ring->pipe, ring->queue);
4462 				       int mec, int pipe, int queue)
4473 	ring->queue = queue;
4481 	sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
6316 	/* tell RLC which is KIQ queue */
6328 		tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);
6336 		tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);
6351 	/* set up default queue priority level
6390 	/* set up gfx queue priority */
6439 	/* active the queue */
6454 		nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
6471 		nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
6564 	/* disable the queue if it's active */
6614 	/* set the vmid for the queue */
6626 	/* set static priority for a compute queue/ring */
6641 	/* inactivate the queue */
6648 	/* disable the queue if it's active */
6728 	/* set the vmid for the queue */
6734 	/* activate the queue */
6761 		nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
6770 		nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
6792 		nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
8216 		/* assume doorbell always being used by mes mapped queue */
8279 		/* assume doorbell always used by mes mapped queue */
8939 		struct amdgpu_mes_queue *queue;
8944 		queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id);
8945 		if (queue) {
8946 			DRM_DEBUG("process mes queue id = %d\n", mes_queue_id);
8947 			amdgpu_fence_process(queue->ring);
8966 				/* Per-queue interrupt is supported for MEC starting from VI.
8968 				 * of per queue.
8972 				    (ring->queue == queue_id))
9035 			/* we only enabled 1 gfx queue per pipe for now */
9045 			    ring->queue == queue_id)
9127 	DRM_DEBUG("IH: CPC GENERIC2_INT, me:%d, pipe:%d, queue:%d\n",