amd/amdgpu/amdgpu_doorbell_mgr.c

30  * @adev: amdgpu_device pointer
36 u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index)
38 	if (amdgpu_device_skip_hw_access(adev))
41 	if (index < adev->doorbell.num_kernel_doorbells)
42 		return readl(adev->doorbell.cpu_addr + index);
51  * @adev: amdgpu_device pointer
58 void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v)
60 	if (amdgpu_device_skip_hw_access(adev))
63 	if (index < adev->doorbell.num_kernel_doorbells)
64 		writel(v, adev->doorbell.cpu_addr + index);
72  * @adev: amdgpu_device pointer
78 u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
80 	if (amdgpu_device_skip_hw_access(adev))
83 	if (index < adev->doorbell.num_kernel_doorbells)
84 		return atomic64_read((atomic64_t *)(adev->doorbell.cpu_addr + index));
93  * @adev: amdgpu_device pointer
100 void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
102 	if (amdgpu_device_skip_hw_access(adev))
105 	if (index < adev->doorbell.num_kernel_doorbells)
106 		atomic64_set((atomic64_t *)(adev->doorbell.cpu_addr + index), v);
114  * @adev: amdgpu_device pointer
121 uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
140  * @adev: amdgpu_device pointer
145 int amdgpu_doorbell_create_kernel_doorbells(struct amdgpu_device *adev)
151 	if (adev->doorbell.num_kernel_doorbells == 0)
155 	size = ALIGN(adev->doorbell.num_kernel_doorbells * sizeof(u32), PAGE_SIZE);
158 	adev->mes.db_start_dw_offset = size / sizeof(u32);
161 	r = amdgpu_bo_create_kernel(adev,
165 				    &adev->doorbell.kernel_doorbells,
167 				    (void **)&adev->doorbell.cpu_addr);
173 	adev->doorbell.num_kernel_doorbells = size / sizeof(u32);
183  * @adev: amdgpu_device pointer
188 int amdgpu_doorbell_init(struct amdgpu_device *adev)
192 	if (adev->asic_type < CHIP_BONAIRE) {
193 		adev->doorbell.base = 0;
194 		adev->doorbell.size = 0;
195 		adev->doorbell.num_kernel_doorbells = 0;
199 	if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
202 	amdgpu_asic_init_doorbell_index(adev);
205 	adev->doorbell.base = pci_resource_start(adev->pdev, 2);
206 	adev->doorbell.size = pci_resource_len(adev->pdev, 2);
208 	adev->doorbell.num_kernel_doorbells =
209 		min_t(u32, adev->doorbell.size / sizeof(u32),
210 		      adev->doorbell_index.max_assignment + 1);
211 	if (adev->doorbell.num_kernel_doorbells == 0)
221 	if (adev->asic_type >= CHIP_VEGA10)
222 		adev->doorbell.num_kernel_doorbells += 0x400;
230  * @adev: amdgpu_device pointer
234 void amdgpu_doorbell_fini(struct amdgpu_device *adev)
236 	amdgpu_bo_free_kernel(&adev->doorbell.kernel_doorbells,
238 			      (void **)&adev->doorbell.cpu_addr);