Lines Matching defs:sdma_rlc_reg_offset
134 uint32_t sdma_rlc_reg_offset;
160 sdma_rlc_reg_offset = sdma_engine_reg_base
164 queue_id, sdma_rlc_reg_offset);
166 return sdma_rlc_reg_offset;
363 uint32_t sdma_rlc_reg_offset;
370 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id,
373 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,
378 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS);
388 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET,
393 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);
394 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR,
396 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI,
399 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1);
401 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,
403 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,
406 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,
408 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,
411 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0);
413 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base);
414 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,
416 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_LO,
418 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,
423 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data);
432 uint32_t sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev,
443 DUMP_REG(sdma_rlc_reg_offset + reg);
445 DUMP_REG(sdma_rlc_reg_offset + reg);
448 DUMP_REG(sdma_rlc_reg_offset + reg);
451 DUMP_REG(sdma_rlc_reg_offset + reg);
485 uint32_t sdma_rlc_reg_offset;
489 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id,
492 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL);
554 uint32_t sdma_rlc_reg_offset;
559 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id,
562 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL);
564 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp);
567 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS);
577 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);
578 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,
579 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) |
582 m->sdmax_rlcx_rb_rptr = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR);
584 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI);