Lines Matching refs:ws16c48gpio

114 static int ws16c48_handle_pre_irq(void *const irq_drv_data) __acquires(&ws16c48gpio->lock)
116 struct ws16c48_gpio *const ws16c48gpio = irq_drv_data;
119 raw_spin_lock(&ws16c48gpio->lock);
124 static int ws16c48_handle_post_irq(void *const irq_drv_data) __releases(&ws16c48gpio->lock)
126 struct ws16c48_gpio *const ws16c48gpio = irq_drv_data;
128 raw_spin_unlock(&ws16c48gpio->lock);
136 struct ws16c48_gpio *const ws16c48gpio = irq_drv_data;
140 raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
143 if (mask_buf == ws16c48gpio->irq_mask[index])
145 ws16c48gpio->irq_mask[index] = mask_buf;
147 ret = regmap_write(ws16c48gpio->map, WS16C48_PAGE_LOCK, ENAB_PAGE);
152 ret = regmap_write(ws16c48gpio->map, WS16C48_ENAB + index, ~mask_buf);
156 ret = regmap_write(ws16c48gpio->map, WS16C48_PAGE_LOCK, INT_ID_PAGE);
161 raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
170 struct ws16c48_gpio *const ws16c48gpio = irq_drv_data;
186 raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
188 ret = regmap_write(ws16c48gpio->map, WS16C48_PAGE_LOCK, POL_PAGE);
193 ret = regmap_update_bits(ws16c48gpio->map, WS16C48_POL + idx, irq_data->mask, polarity);
197 ret = regmap_write(ws16c48gpio->map, WS16C48_PAGE_LOCK, INT_ID_PAGE);
202 raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
247 struct ws16c48_gpio *ws16c48gpio;
255 ws16c48gpio = devm_kzalloc(dev, sizeof(*ws16c48gpio), GFP_KERNEL);
256 if (!ws16c48gpio)
269 ws16c48gpio->map = devm_regmap_init_mmio(dev, regs, &ws16c48_regmap_config);
270 if (IS_ERR(ws16c48gpio->map))
271 return dev_err_probe(dev, PTR_ERR(ws16c48gpio->map),
289 chip->irq_drv_data = ws16c48gpio;
291 raw_spin_lock_init(&ws16c48gpio->lock);
294 err = ws16c48_irq_init_hw(ws16c48gpio->map);
298 err = devm_regmap_add_irq_chip(dev, ws16c48gpio->map, irq[id], 0, 0, chip, &chip_data);
303 gpio_config.regmap = ws16c48gpio->map;