drivers/gpio/gpio-mt7621.c

66 mtk_gpio_w32(struct mtk_gc *rg, u32 offset, u32 val)
68 	struct gpio_chip *gc = &rg->chip;
71 	offset = (rg->bank * GPIO_BANK_STRIDE) + offset;
76 mtk_gpio_r32(struct mtk_gc *rg, u32 offset)
78 	struct gpio_chip *gc = &rg->chip;
81 	offset = (rg->bank * GPIO_BANK_STRIDE) + offset;
89 	struct mtk_gc *rg = to_mediatek_gpio(gc);
94 	pending = mtk_gpio_r32(rg, GPIO_REG_STAT);
98 		mtk_gpio_w32(rg, GPIO_REG_STAT, BIT(bit));
109 	struct mtk_gc *rg = to_mediatek_gpio(gc);
116 	spin_lock_irqsave(&rg->lock, flags);
117 	rise = mtk_gpio_r32(rg, GPIO_REG_REDGE);
118 	fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE);
119 	high = mtk_gpio_r32(rg, GPIO_REG_HLVL);
120 	low = mtk_gpio_r32(rg, GPIO_REG_LLVL);
121 	mtk_gpio_w32(rg, GPIO_REG_REDGE, rise | (BIT(pin) & rg->rising));
122 	mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall | (BIT(pin) & rg->falling));
123 	mtk_gpio_w32(rg, GPIO_REG_HLVL, high | (BIT(pin) & rg->hlevel));
124 	mtk_gpio_w32(rg, GPIO_REG_LLVL, low | (BIT(pin) & rg->llevel));
125 	spin_unlock_irqrestore(&rg->lock, flags);
132 	struct mtk_gc *rg = to_mediatek_gpio(gc);
137 	spin_lock_irqsave(&rg->lock, flags);
138 	rise = mtk_gpio_r32(rg, GPIO_REG_REDGE);
139 	fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE);
140 	high = mtk_gpio_r32(rg, GPIO_REG_HLVL);
141 	low = mtk_gpio_r32(rg, GPIO_REG_LLVL);
142 	mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall & ~BIT(pin));
143 	mtk_gpio_w32(rg, GPIO_REG_REDGE, rise & ~BIT(pin));
144 	mtk_gpio_w32(rg, GPIO_REG_HLVL, high & ~BIT(pin));
145 	mtk_gpio_w32(rg, GPIO_REG_LLVL, low & ~BIT(pin));
146 	spin_unlock_irqrestore(&rg->lock, flags);
155 	struct mtk_gc *rg = to_mediatek_gpio(gc);
160 		if ((rg->rising | rg->falling |
161 		     rg->hlevel | rg->llevel) & mask)
167 	rg->rising &= ~mask;
168 	rg->falling &= ~mask;
169 	rg->hlevel &= ~mask;
170 	rg->llevel &= ~mask;
174 		rg->rising |= mask;
175 		rg->falling |= mask;
178 		rg->rising |= mask;
181 		rg->falling |= mask;
184 		rg->hlevel |= mask;
187 		rg->llevel |= mask;
199 	struct mtk_gc *rg = to_mediatek_gpio(chip);
201 	if (rg->bank != gpio / MTK_BANK_WIDTH)
224 	struct mtk_gc *rg;
228 	rg = &mtk->gc_map[bank];
229 	memset(rg, 0, sizeof(*rg));
231 	spin_lock_init(&rg->lock);
232 	rg->bank = bank;
234 	dat = mtk->base + GPIO_REG_DATA + (rg->bank * GPIO_BANK_STRIDE);
235 	set = mtk->base + GPIO_REG_DSET + (rg->bank * GPIO_BANK_STRIDE);
236 	ctrl = mtk->base + GPIO_REG_DCLR + (rg->bank * GPIO_BANK_STRIDE);
237 	diro = mtk->base + GPIO_REG_CTRL + (rg->bank * GPIO_BANK_STRIDE);
239 	ret = bgpio_init(&rg->chip, dev, 4, dat, set, ctrl, diro, NULL,
246 	rg->chip.of_gpio_n_cells = 2;
247 	rg->chip.of_xlate = mediatek_gpio_xlate;
248 	rg->chip.label = devm_kasprintf(dev, GFP_KERNEL, "%s-bank%d",
250 	if (!rg->chip.label)
253 	rg->chip.offset = bank * MTK_BANK_WIDTH;
264 				       rg->chip.label, &rg->chip);
272 		girq = &rg->chip.irq;
282 	ret = devm_gpiochip_add_data(dev, &rg->chip, mtk);
285 			rg->chip.ngpio, ret);
290 	mtk_gpio_w32(rg, GPIO_REG_POL, 0);
292 	dev_info(dev, "registering %d gpios\n", rg->chip.ngpio);