Lines Matching defs:intr_status
215 u32 intr_status;
222 intr_status = zynq_fpga_read(priv, INT_STS_OFFSET);
223 if (!(intr_status & IXR_ERROR_FLAGS_MASK) &&
224 (intr_status & IXR_DMA_DONE_MASK) && priv->cur_sg) {
389 u32 intr_status;
438 intr_status = zynq_fpga_read(priv, INT_STS_OFFSET);
447 if (intr_status & IXR_ERROR_FLAGS_MASK) {
454 !((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) {
470 intr_status,
490 u32 intr_status;
496 err = zynq_fpga_poll_timeout(priv, INT_STS_OFFSET, intr_status,
497 intr_status & IXR_PCFG_DONE_MASK,
527 u32 intr_status;
536 intr_status = zynq_fpga_read(priv, INT_STS_OFFSET);
539 if (intr_status & IXR_PCFG_DONE_MASK)