drivers/fpga/dfl.c

766 	struct dfl_feature_info *finfo, *p;
810 	list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
817 		feature->id = finfo->fid;
818 		feature->revision = finfo->revision;
819 		feature->dfh_version = finfo->dfh_version;
821 		if (finfo->param_size) {
823 						       finfo->params, finfo->param_size,
828 			feature->param_size = finfo->param_size;
841 						      &finfo->mmio_res);
846 			fdev->resource[res_idx++] = finfo->mmio_res;
849 		if (finfo->nr_irqs) {
850 			ctx = devm_kcalloc(binfo->dev, finfo->nr_irqs,
855 			for (i = 0; i < finfo->nr_irqs; i++)
857 					binfo->irq_table[finfo->irq_base + i];
860 			feature->nr_irqs = finfo->nr_irqs;
863 		list_del(&finfo->node);
864 		kfree(finfo);
922 	struct dfl_feature_info *finfo, *p;
932 		list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
933 			list_del(&finfo->node);
934 			kfree(finfo);
1009 			      resource_size_t ofst, struct dfl_feature_info *finfo)
1013 	void *params = finfo->params;
1015 	u16 fid = finfo->fid;
1020 	switch (finfo->dfh_version) {
1058 		p = find_param(params, finfo->param_size, DFHv1_PARAM_ID_MSI_X);
1068 		dev_warn(binfo->dev, "unexpected DFH version %d\n", finfo->dfh_version);
1073 		finfo->irq_base = 0;
1074 		finfo->nr_irqs = 0;
1097 	finfo->irq_base = ibase;
1098 	finfo->nr_irqs = inr;
1139 	struct dfl_feature_info *finfo;
1169 	finfo = kzalloc(struct_size(finfo, params, dfh_psize / sizeof(u64)), GFP_KERNEL);
1170 	if (!finfo)
1173 	memcpy_fromio(finfo->params, binfo->ioaddr + ofst + DFHv1_PARAM_HDR, dfh_psize);
1174 	finfo->param_size = dfh_psize;
1176 	finfo->fid = fid;
1177 	finfo->revision = revision;
1178 	finfo->dfh_version = dfh_ver;
1193 	finfo->mmio_res.flags = IORESOURCE_MEM;
1194 	finfo->mmio_res.start = start;
1195 	finfo->mmio_res.end = end;
1197 	ret = parse_feature_irqs(binfo, ofst, finfo);
1199 		kfree(finfo);
1203 	list_add_tail(&finfo->node, &binfo->sub_features);