drivers/edac/i5100_edac.c

356 static int i5100_rank_to_slot(const struct mem_ctl_info *mci,
359 	const struct i5100_priv *priv = mci->pvt_info;
410 static unsigned int i5100_csrow_to_rank(const struct mem_ctl_info *mci,
413 	const struct i5100_priv *priv = mci->pvt_info;
419 static unsigned int i5100_csrow_to_chan(const struct mem_ctl_info *mci,
422 	const struct i5100_priv *priv = mci->pvt_info;
427 static void i5100_handle_ce(struct mem_ctl_info *mci,
443 	edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
449 static void i5100_handle_ue(struct mem_ctl_info *mci,
465 	edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
471 static void i5100_read_log(struct mem_ctl_info *mci, int chan,
474 	struct i5100_priv *priv = mci->pvt_info;
512 		i5100_handle_ce(mci, chan, bank, rank, syndrome, cas, ras, msg);
534 		i5100_handle_ue(mci, chan, bank, rank, syndrome, cas, ras, msg);
540 static void i5100_check_error(struct mem_ctl_info *mci)
542 	struct i5100_priv *priv = mci->pvt_info;
550 		i5100_read_log(mci, i5100_ferr_nf_mem_chan_indx(dw),
592 static int i5100_set_scrub_rate(struct mem_ctl_info *mci, u32 bandwidth)
594 	struct i5100_priv *priv = mci->pvt_info;
617 static int i5100_get_scrub_rate(struct mem_ctl_info *mci)
619 	struct i5100_priv *priv = mci->pvt_info;
646 static unsigned long i5100_npages(struct mem_ctl_info *mci, unsigned int csrow)
648 	struct i5100_priv *priv = mci->pvt_info;
649 	const unsigned int chan_rank = i5100_csrow_to_rank(mci, csrow);
650 	const unsigned int chan = i5100_csrow_to_chan(mci, csrow);
667 static void i5100_init_mtr(struct mem_ctl_info *mci)
669 	struct i5100_priv *priv = mci->pvt_info;
699 static int i5100_read_spd_byte(const struct mem_ctl_info *mci,
702 	struct i5100_priv *priv = mci->pvt_info;
737 static void i5100_init_dimm_csmap(struct mem_ctl_info *mci)
739 	struct i5100_priv *priv = mci->pvt_info;
768 				   struct mem_ctl_info *mci)
770 	struct i5100_priv *priv = mci->pvt_info;
779 			if (i5100_read_spd_byte(mci, i, j, 5, &rank) < 0)
786 	i5100_init_dimm_csmap(mci);
790 				    struct mem_ctl_info *mci)
794 	struct i5100_priv *priv = mci->pvt_info;
832 	i5100_init_mtr(mci);
835 static void i5100_init_csrows(struct mem_ctl_info *mci)
837 	struct i5100_priv *priv = mci->pvt_info;
840 	mci_for_each_dimm(mci, dimm) {
841 		const unsigned long npages = i5100_npages(mci, dimm->idx);
842 		const unsigned int chan = i5100_csrow_to_chan(mci, dimm->idx);
843 		const unsigned int rank = i5100_csrow_to_rank(mci, dimm->idx);
855 			 i5100_rank_to_slot(mci, chan, rank));
866 static void i5100_do_inject(struct mem_ctl_info *mci)
868 	struct i5100_priv *priv = mci->pvt_info;
931 	struct mem_ctl_info *mci = to_mci(dev);
933 	i5100_do_inject(mci);
944 static int i5100_setup_debugfs(struct mem_ctl_info *mci)
946 	struct i5100_priv *priv = mci->pvt_info;
951 	priv->debugfs = edac_debugfs_create_dir_at(mci->bus->name, i5100_debugfs);
969 				&mci->dev, &i5100_inject_enable_fops);
978 	struct mem_ctl_info *mci;
1046 	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers,
1048 	if (!mci) {
1068 	mci->pdev = &pdev->dev;
1070 	priv = mci->pvt_info;
1087 	i5100_init_dimm_layout(pdev, mci);
1088 	i5100_init_interleaving(pdev, mci);
1090 	mci->mtype_cap = MEM_FLAG_FB_DDR2;
1091 	mci->edac_ctl_cap = EDAC_FLAG_SECDED;
1092 	mci->edac_cap = EDAC_FLAG_SECDED;
1093 	mci->mod_name = "i5100_edac.c";
1094 	mci->ctl_name = "i5100";
1095 	mci->dev_name = pci_name(pdev);
1096 	mci->ctl_page_to_phys = NULL;
1098 	mci->edac_check = i5100_check_error;
1099 	mci->set_sdram_scrub_rate = i5100_set_scrub_rate;
1100 	mci->get_sdram_scrub_rate = i5100_get_scrub_rate;
1109 	i5100_init_csrows(mci);
1121 	if (edac_mc_add_mc(mci)) {
1126 	i5100_setup_debugfs(mci);
1139 	edac_mc_free(mci);
1162 	struct mem_ctl_info *mci;
1165 	mci = edac_mc_del_mc(&pdev->dev);
1167 	if (!mci)
1170 	priv = mci->pvt_info;
1185 	edac_mc_free(mci);