drivers/edac/i10nm_base.c

27 	(res_cfg->type == GNR ? 0xd4 : 0xd8) + (i) * 4, &(reg))
30 	(res_cfg->type == GNR ? 12 : 8), &(reg))
35 	res_cfg->type == GNR ? 0x290 : 0x90, &(reg))
38 	res_cfg->type == GNR ? 0x298 : 0x98, &(reg))
41 	(res_cfg->type == GNR ? 0xc0c : 0x2080c)) +	\
48 	(res_cfg->type == GNR ? 0xaf8 : 0x20ef8)) +	\
52 	(res_cfg->type == GNR ? 0xc14 : 0x20814)) +	\
87 static struct res_config *res_cfg;
170 		imc_num  = res_cfg->ddr_imc_num;
171 		chan_num = res_cfg->ddr_chan_num;
180 							  res_cfg->offsets_scrub,
181 							  res_cfg->offsets_demand,
182 							  res_cfg->offsets_demand2);
185 		imc_num += res_cfg->hbm_imc_num;
186 		chan_num = res_cfg->hbm_chan_num;
195 							  res_cfg->offsets_scrub_hbm0,
196 							  res_cfg->offsets_demand_hbm0,
199 							  res_cfg->offsets_scrub_hbm1,
200 							  res_cfg->offsets_demand_hbm1,
227 			offsets = scrub_err ? res_cfg->offsets_scrub_hbm1 :
228 					      res_cfg->offsets_demand_hbm1;
230 			offsets = scrub_err ? res_cfg->offsets_scrub_hbm0 :
231 					      res_cfg->offsets_demand_hbm0;
234 			offsets = res_cfg->offsets_scrub;
236 			offsets = res_cfg->offsets_demand;
237 			xffsets = res_cfg->offsets_demand2;
255 	if (res_cfg->type == SPR) {
357 		d->pcu_cr3 = pci_get_dev_wrapper(d->seg, d->bus[res_cfg->pcu_cr3_bdf.bus],
358 						 res_cfg->pcu_cr3_bdf.dev,
359 						 res_cfg->pcu_cr3_bdf.fun);
418 		d->sad_all = pci_get_dev_wrapper(d->seg, d->bus[res_cfg->sad_all_bdf.bus],
419 						 res_cfg->sad_all_bdf.dev,
420 						 res_cfg->sad_all_bdf.fun);
442 	switch (res_cfg->type) {
489 	switch (res_cfg->type) {
530 	switch (res_cfg->type) {
590 					   d->bus[res_cfg->ddr_mdev_bdf.bus],
591 					   res_cfg->ddr_mdev_bdf.dev + i / 7,
592 					   res_cfg->ddr_mdev_bdf.fun + i % 7);
624 	switch (res_cfg->type) {
648 					   d->bus[res_cfg->ddr_mdev_bdf.bus],
649 					   res_cfg->ddr_mdev_bdf.dev + i,
650 					   res_cfg->ddr_mdev_bdf.fun);
673 	switch (res_cfg->type) {
675 		for (i = 0; i < res_cfg->ddr_chan_num; i++) {
708 		d->util_all = pci_get_dev_wrapper(d->seg, d->bus[res_cfg->util_all_bdf.bus],
709 						  res_cfg->util_all_bdf.dev,
710 						  res_cfg->util_all_bdf.fun);
714 		d->uracu = pci_get_dev_wrapper(d->seg, d->bus[res_cfg->uracu_bdf.bus],
715 					       res_cfg->uracu_bdf.dev,
716 					       res_cfg->uracu_bdf.fun);
729 		for (lmc = 0, i = 0; i < res_cfg->ddr_imc_num; i++) {
808 		lmc = res_cfg->ddr_imc_num;
810 		for (i = 0; i < res_cfg->hbm_imc_num; i++) {
811 			mdev = pci_get_dev_wrapper(d->seg, d->bus[res_cfg->hbm_mdev_bdf.bus],
812 						   res_cfg->hbm_mdev_bdf.dev + i / 4,
813 						   res_cfg->hbm_mdev_bdf.fun + i % 4);
985 		if (res_cfg->type != GNR)
1092 	res_cfg = cfg;
1118 	imc_num = res_cfg->ddr_imc_num + res_cfg->hbm_imc_num;
1164 	if (retry_rd_err_log && res_cfg->offsets_scrub && res_cfg->offsets_demand) {
1184 	if (retry_rd_err_log && res_cfg->offsets_scrub && res_cfg->offsets_demand) {