drivers/edac/amd64_edac.c

231 static int set_scrub_rate(struct mem_ctl_info *mci, u32 bw)
233 	struct amd64_pvt *pvt = mci->pvt_info;
250 static int get_scrub_rate(struct mem_ctl_info *mci)
252 	struct amd64_pvt *pvt = mci->pvt_info;
306 static struct mem_ctl_info *find_mc_by_sys_addr(struct mem_ctl_info *mci,
317 	pvt = mci->pvt_info;
442  * @input_addr is an InputAddr associated with the node given by mci. Return the
445 static int input_addr_to_csrow(struct mem_ctl_info *mci, u64 input_addr)
451 	pvt = mci->pvt_info;
477  * for the node represented by mci. Info is passed back in *hole_base,
491 static int get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base,
494 	struct amd64_pvt *pvt = mci->pvt_info;
551 	struct mem_ctl_info *mci = to_mci(dev);				\
552 	struct amd64_pvt *pvt = mci->pvt_info;				\
565 	struct mem_ctl_info *mci = to_mci(dev);
571 	get_dram_hole_info(mci, &hole_base, &hole_offset, &hole_size);
602 	struct mem_ctl_info *mci = to_mci(dev);
603 	struct amd64_pvt *pvt = mci->pvt_info;
617 	struct mem_ctl_info *mci = to_mci(dev);
618 	struct amd64_pvt *pvt = mci->pvt_info;
638 	struct mem_ctl_info *mci = to_mci(dev);
639 	struct amd64_pvt *pvt = mci->pvt_info;
653 	struct mem_ctl_info *mci = to_mci(dev);
654 	struct amd64_pvt *pvt = mci->pvt_info;
675 	struct mem_ctl_info *mci = to_mci(dev);
676 	struct amd64_pvt *pvt = mci->pvt_info;
689 	struct mem_ctl_info *mci = to_mci(dev);
690 	struct amd64_pvt *pvt = mci->pvt_info;
715 	struct mem_ctl_info *mci = to_mci(dev);
716 	struct amd64_pvt *pvt = mci->pvt_info;
748 	struct mem_ctl_info *mci = to_mci(dev);
749 	struct amd64_pvt *pvt = mci->pvt_info;
811 	struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
812 	struct amd64_pvt *pvt = mci->pvt_info;
829  * assumed that sys_addr maps to the node given by mci.
856 static u64 sys_addr_to_dram_addr(struct mem_ctl_info *mci, u64 sys_addr)
858 	struct amd64_pvt *pvt = mci->pvt_info;
864 	ret = get_dram_hole_info(mci, &hole_base, &hole_offset, &hole_size);
911 static u64 dram_addr_to_input_addr(struct mem_ctl_info *mci, u64 dram_addr)
917 	pvt = mci->pvt_info;
936  * assumed that @sys_addr maps to the node given by mci.
938 static u64 sys_addr_to_input_addr(struct mem_ctl_info *mci, u64 sys_addr)
943 	    dram_addr_to_input_addr(mci, sys_addr_to_dram_addr(mci, sys_addr));
962  * of a node that detected an ECC memory error.  mci represents the node that
967 static int sys_addr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr)
971 	csrow = input_addr_to_csrow(mci, sys_addr_to_input_addr(mci, sys_addr));
974 		amd64_mc_err(mci, "Failed to translate InputAddr to csrow for "
1647 	struct mem_ctl_info *mci;
1652 	mci = edac_mc_find(mce_nid);
1653 	if (!mci)
1656 	pvt = mci->pvt_info;
1779 static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,
1782 	struct amd64_pvt *pvt = mci->pvt_info;
1790 	err->src_mci = find_mc_by_sys_addr(mci, sys_addr);
1792 		amd64_mc_err(mci, "failed to map error addr 0x%lx to a node\n",
1807 		err->channel = get_channel_from_ecc_syndrome(mci, err->syndrome);
2208 	struct mem_ctl_info *mci;
2214 	mci = edac_mc_find(nid);
2215 	if (!mci)
2218 	pvt = mci->pvt_info;
2521 static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,
2524 	struct amd64_pvt *pvt = mci->pvt_info;
2540 		err->channel = get_channel_from_ecc_syndrome(mci, err->syndrome);
2678 static int get_channel_from_ecc_syndrome(struct mem_ctl_info *mci, u16 syndrome)
2680 	struct amd64_pvt *pvt = mci->pvt_info;
2699 static void __log_ecc_error(struct mem_ctl_info *mci, struct err_info *err,
2740 	edac_mc_handle_error(err_type, mci, 1,
2748 	struct mem_ctl_info *mci;
2756 	mci = edac_mc_find(node_id);
2757 	if (!mci)
2760 	pvt = mci->pvt_info;
2777 	pvt->ops->map_sysaddr_to_csrow(mci, sys_addr, &err);
2779 	__log_ecc_error(mci, &err, ecc_type);
2803 	struct mem_ctl_info *mci;
2811 	mci = edac_mc_find(node_id);
2812 	if (!mci)
2815 	pvt = mci->pvt_info;
2851 	__log_ecc_error(mci, &err, ecc_type);
3066 static void umc_init_csrows(struct mem_ctl_info *mci)
3068 	struct amd64_pvt *pvt = mci->pvt_info;
3074 	if (mci->edac_ctl_cap & EDAC_FLAG_S16ECD16ED) {
3077 	} else if (mci->edac_ctl_cap & EDAC_FLAG_S8ECD8ED) {
3080 	} else if (mci->edac_ctl_cap & EDAC_FLAG_S4ECD4ED) {
3083 	} else if (mci->edac_ctl_cap & EDAC_FLAG_SECDED) {
3092 			dimm = mci->csrows[cs]->channels[umc]->dimm;
3110 static void dct_init_csrows(struct mem_ctl_info *mci)
3112 	struct amd64_pvt *pvt = mci->pvt_info;
3141 		csrow = mci->csrows[i];
3396 umc_determine_edac_ctl_cap(struct mem_ctl_info *mci, struct amd64_pvt *pvt)
3412 		mci->edac_ctl_cap |= EDAC_FLAG_SECDED;
3418 			mci->edac_ctl_cap |= EDAC_FLAG_S4ECD4ED;
3420 			mci->edac_ctl_cap |= EDAC_FLAG_S16ECD16ED;
3422 			mci->edac_ctl_cap |= EDAC_FLAG_S8ECD8ED;
3426 static void dct_setup_mci_misc_attrs(struct mem_ctl_info *mci)
3428 	struct amd64_pvt *pvt = mci->pvt_info;
3430 	mci->mtype_cap		= MEM_FLAG_DDR2 | MEM_FLAG_RDDR2;
3431 	mci->edac_ctl_cap	= EDAC_FLAG_NONE;
3434 		mci->edac_ctl_cap |= EDAC_FLAG_SECDED;
3437 		mci->edac_ctl_cap |= EDAC_FLAG_S4ECD4ED;
3439 	mci->edac_cap		= dct_determine_edac_cap(pvt);
3440 	mci->mod_name		= EDAC_MOD_STR;
3441 	mci->ctl_name		= pvt->ctl_name;
3442 	mci->dev_name		= pci_name(pvt->F3);
3443 	mci->ctl_page_to_phys	= NULL;
3446 	mci->set_sdram_scrub_rate = set_scrub_rate;
3447 	mci->get_sdram_scrub_rate = get_scrub_rate;
3449 	dct_init_csrows(mci);
3452 static void umc_setup_mci_misc_attrs(struct mem_ctl_info *mci)
3454 	struct amd64_pvt *pvt = mci->pvt_info;
3456 	mci->mtype_cap		= MEM_FLAG_DDR4 | MEM_FLAG_RDDR4;
3457 	mci->edac_ctl_cap	= EDAC_FLAG_NONE;
3459 	umc_determine_edac_ctl_cap(mci, pvt);
3461 	mci->edac_cap		= umc_determine_edac_cap(pvt);
3462 	mci->mod_name		= EDAC_MOD_STR;
3463 	mci->ctl_name		= pvt->ctl_name;
3464 	mci->dev_name		= pci_name(pvt->F3);
3465 	mci->ctl_page_to_phys	= NULL;
3467 	umc_init_csrows(mci);
3578 static void gpu_init_csrows(struct mem_ctl_info *mci)
3580 	struct amd64_pvt *pvt = mci->pvt_info;
3589 			dimm = mci->csrows[umc]->channels[cs]->dimm;
3603 static void gpu_setup_mci_misc_attrs(struct mem_ctl_info *mci)
3605 	struct amd64_pvt *pvt = mci->pvt_info;
3607 	mci->mtype_cap		= MEM_FLAG_HBM2;
3608 	mci->edac_ctl_cap	= EDAC_FLAG_SECDED;
3610 	mci->edac_cap		= EDAC_FLAG_EC;
3611 	mci->mod_name		= EDAC_MOD_STR;
3612 	mci->ctl_name		= pvt->ctl_name;
3613 	mci->dev_name		= pci_name(pvt->F3);
3614 	mci->ctl_page_to_phys	= NULL;
3616 	gpu_init_csrows(mci);
3955 	struct mem_ctl_info *mci = NULL;
3966 	mci = edac_mc_alloc(pvt->mc_node_id, ARRAY_SIZE(layers), layers, 0);
3967 	if (!mci)
3970 	mci->pvt_info = pvt;
3971 	mci->pdev = &pvt->F3->dev;
3973 	pvt->ops->setup_mci_misc_attrs(mci);
3976 	if (edac_mc_add_mc_with_groups(mci, amd64_edac_attr_groups)) {
3978 		edac_mc_free(mci);
4082 	struct mem_ctl_info *mci;
4086 	mci = edac_mc_del_mc(&F3->dev);
4087 	if (!mci)
4090 	pvt = mci->pvt_info;
4098 	mci->pvt_info = NULL;
4102 	edac_mc_free(mci);