Lines Matching refs:dmacr
2545 u32 dmacr;
2550 dmacr = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR);
2559 dmacr &= ~XILINX_DMA_DMACR_GENLOCK_EN;
2561 dmacr |= XILINX_DMA_DMACR_GENLOCK_EN;
2562 dmacr &= ~XILINX_DMA_DMACR_MASTER_MASK;
2563 dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT;
2578 dmacr &= ~XILINX_DMA_DMACR_FRAME_COUNT_MASK;
2579 dmacr |= cfg->coalesc << XILINX_DMA_DMACR_FRAME_COUNT_SHIFT;
2584 dmacr &= ~XILINX_DMA_DMACR_DELAY_MASK;
2585 dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT;
2590 dmacr &= ~XILINX_DMA_DMACR_FSYNCSRC_MASK;
2591 dmacr |= cfg->ext_fsync << XILINX_DMA_DMACR_FSYNCSRC_SHIFT;
2593 dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, dmacr);