dma/ptdma/ptdma-dev.c

104 	struct pt_device *pt = container_of(cmd_q, struct pt_device, cmd_q);
117 		pt_core_enable_queue_interrupts(pt);
119 		pt_core_disable_queue_interrupts(pt);
128 	struct pt_cmd_queue *cmd_q = &cmd->pt->cmd_q;
137 		pt_log_error(cmd_q->pt, cmd_q->cmd_error);
144 void pt_check_status_trans(struct pt_device *pt, struct pt_cmd_queue *cmd_q)
160 		pt_do_cmd_complete((ulong)&pt->tdata);
166 	struct pt_device *pt = data;
167 	struct pt_cmd_queue *cmd_q = &pt->cmd_q;
169 	pt_core_disable_queue_interrupts(pt);
170 	pt->total_interrupts++;
171 	pt_check_status_trans(pt, cmd_q);
172 	pt_core_enable_queue_interrupts(pt);
176 int pt_core_init(struct pt_device *pt)
179 	struct pt_cmd_queue *cmd_q = &pt->cmd_q;
181 	struct device *dev = pt->dev;
186 	snprintf(dma_pool_name, sizeof(dma_pool_name), "%s_q", dev_name(pt->dev));
195 	iowrite32(CMD_CONFIG_VHB_EN, pt->io_regs + CMD_CONFIG_OFFSET);
196 	iowrite32(CMD_QUEUE_PRIO, pt->io_regs + CMD_QUEUE_PRIO_OFFSET);
197 	iowrite32(CMD_TIMEOUT_DISABLE, pt->io_regs + CMD_TIMEOUT_OFFSET);
198 	iowrite32(CMD_CLK_GATE_CONFIG, pt->io_regs + CMD_CLK_GATE_CTL_OFFSET);
199 	iowrite32(CMD_CONFIG_REQID, pt->io_regs + CMD_REQID_CONFIG_OFFSET);
201 	cmd_q->pt = pt;
219 	cmd_q->reg_control = pt->io_regs + CMD_Q_STATUS_INCR;
222 	pt_core_disable_queue_interrupts(pt);
234 	ret = request_irq(pt->pt_irq, pt_core_irq_handler, 0, dev_name(pt->dev), pt);
253 	pt_core_enable_queue_interrupts(pt);
256 	ret = pt_dmaengine_register(pt);
261 	ptdma_debugfs_setup(pt);
266 	free_irq(pt->pt_irq, pt);
272 	dma_pool_destroy(pt->cmd_q.dma_pool);
277 void pt_core_destroy(struct pt_device *pt)
279 	struct device *dev = pt->dev;
280 	struct pt_cmd_queue *cmd_q = &pt->cmd_q;
284 	pt_dmaengine_unregister(pt);
287 	pt_core_disable_queue_interrupts(pt);
297 	free_irq(pt->pt_irq, pt);
303 	while (!list_empty(&pt->cmd)) {
305 		cmd = list_first_entry(&pt->cmd, struct pt_cmd, entry);