Lines Matching refs:channels
98 u32 dmaerqh; /* DMA enable request high(channels 63~32) */
99 u32 dmaerql; /* DMA enable request low(channels 31~0) */
129 /* DMA channels(0~63) priority */
218 struct mpc_dma_chan channels[MPC_DMA_CHANNELS];
243 return container_of(mchan, struct mpc_dma, channels[c->chan_id]);
317 /* Handle interrupt on one half of DMA controller (32 channels) */
327 mchan = &mdma->channels[ch + off];
387 mchan = &mdma->channels[i];
988 INIT_LIST_HEAD(&dma->channels);
998 mchan = &mdma->channels[i];
1010 list_add_tail(&mchan->chan.device_node, &dma->channels);
1022 /* MPC8308 has 16 channels and lacks some registers */