dma/dw-axi-dmac/dw-axi-dmac-platform.c

300 	desc->hw_desc = kcalloc(num, sizeof(*desc->hw_desc), GFP_NOWAIT);
301 	if (!desc->hw_desc) {
332 	struct axi_dma_hw_desc *hw_desc;
336 		hw_desc = &desc->hw_desc[descs_put];
337 		dma_pool_free(chan->desc_pool, hw_desc->lli, hw_desc->llp);
340 	kfree(desc->hw_desc);
377 		len = vd_to_axi_desc(vdesc)->hw_desc[0].len;
470 	write_chan_llp(chan, first->hw_desc[0].llp | lms);
633 static void set_desc_dest_master(struct axi_dma_hw_desc *hw_desc,
639 	val = le32_to_cpu(hw_desc->lli->ctl_lo);
645 	hw_desc->lli->ctl_lo = cpu_to_le32(val);
649 				  struct axi_dma_hw_desc *hw_desc,
698 	hw_desc->lli = axi_desc_get(chan, &hw_desc->llp);
699 	if (unlikely(!hw_desc->lli))
711 	hw_desc->lli->ctl_hi = cpu_to_le32(ctlhi);
714 		write_desc_sar(hw_desc, mem_addr);
715 		write_desc_dar(hw_desc, device_addr);
717 		write_desc_sar(hw_desc, device_addr);
718 		write_desc_dar(hw_desc, mem_addr);
721 	hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1);
725 	hw_desc->lli->ctl_lo = cpu_to_le32(ctllo);
727 	set_desc_src_master(hw_desc);
729 	hw_desc->len = len;
769 	struct axi_dma_hw_desc *hw_desc = NULL;
803 		hw_desc = &desc->hw_desc[i];
805 		status = dw_axi_dma_set_hw_desc(chan, hw_desc, src_addr,
810 		desc->length += hw_desc->len;
814 		set_desc_last(hw_desc);
819 	llp = desc->hw_desc[0].llp;
823 		hw_desc = &desc->hw_desc[--total_segments];
824 		write_desc_llp(hw_desc, llp | lms);
825 		llp = hw_desc->llp;
846 	struct axi_dma_hw_desc *hw_desc = NULL;
887 			hw_desc = &desc->hw_desc[loop++];
888 			status = dw_axi_dma_set_hw_desc(chan, hw_desc, mem, segment_len);
892 			desc->length += hw_desc->len;
899 	set_desc_last(&desc->hw_desc[num_sgs - 1]);
903 		hw_desc = &desc->hw_desc[--num_sgs];
904 		write_desc_llp(hw_desc, llp | lms);
905 		llp = hw_desc->llp;
925 	struct axi_dma_hw_desc *hw_desc = NULL;
947 		hw_desc = &desc->hw_desc[num];
966 		hw_desc->lli = axi_desc_get(chan, &hw_desc->llp);
967 		if (unlikely(!hw_desc->lli))
970 		write_desc_sar(hw_desc, src_adr);
971 		write_desc_dar(hw_desc, dst_adr);
972 		hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1);
983 		hw_desc->lli->ctl_hi = cpu_to_le32(reg);
991 		hw_desc->lli->ctl_lo = cpu_to_le32(reg);
993 		set_desc_src_master(hw_desc);
994 		set_desc_dest_master(hw_desc, desc);
996 		hw_desc->len = xfer_len;
997 		desc->length += hw_desc->len;
1006 	set_desc_last(&desc->hw_desc[num - 1]);
1009 		hw_desc = &desc->hw_desc[--num];
1010 		write_desc_llp(hw_desc, llp | lms);
1011 		llp = hw_desc->llp;
1057 		axi_chan_dump_lli(chan, &desc_head->hw_desc[i]);
1097 	struct axi_dma_hw_desc *hw_desc;
1124 				hw_desc = &desc->hw_desc[i];
1125 				if (hw_desc->llp == llp) {
1126 					axi_chan_irq_clear(chan, hw_desc->lli->status_lo);
1127 					hw_desc->lli->ctl_hi |= CH_CTL_H_LLI_VALID;
1130 					if (((hw_desc->len * (i + 1)) % desc->period_len) == 0)