Lines Matching refs:ch
50 #define REG_CHAN_CTL(ch) (0x8000 + (ch) * 0x200)
53 #define REG_DESC_RING(ch) (0x8070 + (ch) * 0x200)
54 #define REG_REPORT_RING(ch) (0x8074 + (ch) * 0x200)
56 #define REG_RESIDUE(ch) (0x8064 + (ch) * 0x200)
58 #define REG_BUS_WIDTH(ch) (0x8040 + (ch) * 0x200)
68 #define REG_CHAN_SRAM_CARVEOUT(ch) (0x8050 + (ch) * 0x200)
72 #define REG_CHAN_FIFOCTL(ch) (0x8054 + (ch) * 0x200)
76 #define REG_DESC_WRITE(ch) (0x10000 + ((ch) / 2) * 0x4 + ((ch) & 1) * 0x4000)
77 #define REG_REPORT_READ(ch) (0x10100 + ((ch) / 2) * 0x4 + ((ch) & 1) * 0x4000)
82 #define REG_CHAN_INTSTATUS(ch, idx) (0x8010 + (ch) * 0x200 + (idx) * 4)
83 #define REG_CHAN_INTMASK(ch, idx) (0x8020 + (ch) * 0x200 + (idx) * 4)
295 dev_dbg(ad->dev, "ch%d descriptor: addr=0x%pad len=0x%zx flags=0x%lx\n",
429 dev_dbg(adchan->host->dev, "ch%d start\n", adchan->no);
447 dev_dbg(adchan->host->dev, "ch%d stop\n", adchan->no);
462 int ch = adchan->no;
465 writel_relaxed(0, ad->base + REG_CHAN_CTL(ch));
467 admac_cyclic_write_one_desc(ad, ch, adchan->current_tx);
469 admac_cyclic_write_desc(ad, ch, adchan->current_tx);
613 dev_dbg(ad->dev, "ch%d report: countval=0x%llx unk1=0x%x flags=0x%x\n",
626 dev_err_ratelimited(ad->dev, "ch%d descriptor ring error\n", channo);
632 dev_err_ratelimited(ad->dev, "ch%d report ring error\n", channo);
637 dev_err(ad->dev, "ch%d unknown error, masking errors as cause of IRQs\n", channo);