Lines Matching refs:CXL
19 * CXL Regions represent mapped memory capacity in system physical address
20 * space. Whereas the CXL Root Decoders identify the bounds of potential CXL
872 * Per CXL Spec 3.1 8.2.4.20.12 software must commit decoders
1029 * The attach event is an opportunity to validate CXL decode setup
1500 dev_err(&cxlr->dev, "mismatched CXL topologies detected\n");
2213 EXPORT_SYMBOL_NS_GPL(is_cxl_region, CXL);
2551 EXPORT_SYMBOL_NS_GPL(is_cxl_pmem_region, CXL);
2560 EXPORT_SYMBOL_NS_GPL(to_cxl_pmem_region, CXL);
2629 * CXL 3.0 Spec 8.2.9.8.4.1
2770 * ways and granularity and is defined in the CXL Spec 3.0 Section
2846 * Regions never span CXL root devices, so by definition the
2905 EXPORT_SYMBOL_NS_GPL(to_cxl_dax_region, CXL);
2978 * @cxlr: parent CXL region for this pmem region bridge device
3149 * RAM" on CXL window boundaries see cxl_region_iomem_release()
3199 "%s:%s no CXL window for range %#llx:%#llx\n",
3248 EXPORT_SYMBOL_NS_GPL(cxl_add_to_region, CXL);
3299 * The region can not be manged by CXL if any portion of
3331 MODULE_IMPORT_NS(CXL);