Lines Matching refs:cryp

12 #include "jh7110-cryp.h"
39 static inline int starfive_hash_wait_busy(struct starfive_cryp_dev *cryp)
43 return readl_relaxed_poll_timeout(cryp->base + STARFIVE_HASH_SHACSR, status,
47 static inline int starfive_hash_wait_hmac_done(struct starfive_cryp_dev *cryp)
51 return readl_relaxed_poll_timeout(cryp->base + STARFIVE_HASH_SHACSR, status,
57 struct starfive_cryp_dev *cryp = ctx->cryp;
60 return readl_relaxed_poll_timeout(cryp->base + STARFIVE_HASH_SHACSR, status,
67 struct starfive_cryp_dev *cryp = ctx->cryp;
72 writel(ctx->keylen, cryp->base + STARFIVE_HASH_SHAWKLEN);
77 writel(rctx->csr.hash.v, cryp->base + STARFIVE_HASH_SHACSR);
80 writel(*key, cryp->base + STARFIVE_HASH_SHAWKR);
85 writeb(*cl, cryp->base + STARFIVE_HASH_SHAWKR);
89 return dev_err_probe(cryp->dev, -ETIMEDOUT, "starfive_hash_wait_key_done error\n");
94 static void starfive_hash_start(struct starfive_cryp_dev *cryp)
98 csr.v = readl(cryp->base + STARFIVE_HASH_SHACSR);
101 writel(csr.v, cryp->base + STARFIVE_HASH_SHACSR);
106 struct starfive_cryp_dev *cryp = param;
108 complete(&cryp->dma_done);
111 static void starfive_hash_dma_init(struct starfive_cryp_dev *cryp)
113 cryp->cfg_in.src_addr_width = DMA_SLAVE_BUSWIDTH_16_BYTES;
114 cryp->cfg_in.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
115 cryp->cfg_in.src_maxburst = cryp->dma_maxburst;
116 cryp->cfg_in.dst_maxburst = cryp->dma_maxburst;
117 cryp->cfg_in.dst_addr = cryp->phys_base + STARFIVE_ALG_FIFO_OFFSET;
119 dmaengine_slave_config(cryp->tx, &cryp->cfg_in);
121 init_completion(&cryp->dma_done);
124 static int starfive_hash_dma_xfer(struct starfive_cryp_dev *cryp,
134 writel(alg_cr.v, cryp->base + STARFIVE_ALG_CR_OFFSET);
136 writel(sg_dma_len(sg), cryp->base + STARFIVE_DMA_IN_LEN_OFFSET);
139 in_desc = dmaengine_prep_slave_sg(cryp->tx, sg, 1, DMA_MEM_TO_DEV,
146 reinit_completion(&cryp->dma_done);
148 in_desc->callback_param = cryp;
151 dma_async_issue_pending(cryp->tx);
153 if (!wait_for_completion_timeout(&cryp->dma_done,
160 writel(alg_cr.v, cryp->base + STARFIVE_ALG_CR_OFFSET);
179 put_unaligned(readl(ctx->cryp->base + STARFIVE_HASH_SHARDR),
185 static void starfive_hash_done_task(struct starfive_cryp_dev *cryp)
187 int err = cryp->err;
190 err = starfive_hash_copy_hash(cryp->req.hreq);
192 crypto_finalize_hash_request(cryp->engine, cryp->req.hreq, err);
201 struct starfive_cryp_dev *cryp = ctx->cryp;
205 writel(STARFIVE_HASH_RESET, cryp->base + STARFIVE_HASH_SHACSR);
207 if (starfive_hash_wait_busy(cryp))
208 return dev_err_probe(cryp->dev, -ETIMEDOUT, "Error resetting hardware\n");
220 writel(rctx->csr.hash.v, cryp->base + STARFIVE_HASH_SHACSR);
227 starfive_hash_dma_init(cryp);
230 src_nents = dma_map_sg(cryp->dev, tsg, 1, DMA_TO_DEVICE);
232 return dev_err_probe(cryp->dev, -ENOMEM,
235 ret = starfive_hash_dma_xfer(cryp, tsg);
236 dma_unmap_sg(cryp->dev, tsg, 1, DMA_TO_DEVICE);
242 starfive_hash_start(cryp);
244 if (starfive_hash_wait_busy(cryp))
245 return dev_err_probe(cryp->dev, -ETIMEDOUT, "Error generating digest\n");
248 cryp->err = starfive_hash_wait_hmac_done(cryp);
250 starfive_hash_done_task(cryp);
328 struct starfive_cryp_dev *cryp = ctx->cryp;
332 cryp->req.hreq = req;
340 return crypto_transfer_hash_request_to_engine(cryp->engine, req);
378 ctx->cryp = starfive_cryp_find_dev(ctx);
380 if (!ctx->cryp)
387 return dev_err_probe(ctx->cryp->dev, PTR_ERR(ctx->ahash_fbk),