drivers/crypto/sahara.c

196 	struct sahara_hw_desc	*hw_desc[SAHARA_MAX_HW_DESC];
403 		dev_dbg(dev->device, "\thdr = 0x%08x\n", dev->hw_desc[i]->hdr);
404 		dev_dbg(dev->device, "\tlen1 = %u\n", dev->hw_desc[i]->len1);
405 		dev_dbg(dev->device, "\tp1 = 0x%08x\n", dev->hw_desc[i]->p1);
406 		dev_dbg(dev->device, "\tlen2 = %u\n", dev->hw_desc[i]->len2);
407 		dev_dbg(dev->device, "\tp2 = 0x%08x\n", dev->hw_desc[i]->p2);
409 			dev->hw_desc[i]->next);
444 		dev->hw_desc[idx]->len1 = AES_BLOCK_SIZE;
445 		dev->hw_desc[idx]->p1 = dev->iv_phys_base;
447 		dev->hw_desc[idx]->len1 = 0;
448 		dev->hw_desc[idx]->p1 = 0;
450 	dev->hw_desc[idx]->len2 = ctx->keylen;
451 	dev->hw_desc[idx]->p2 = dev->key_phys_base;
452 	dev->hw_desc[idx]->next = dev->hw_phys_desc[1];
453 	dev->hw_desc[idx]->hdr = sahara_aes_key_hdr(dev);
489 	dev->hw_desc[idx]->p1 = dev->hw_phys_link[0];
505 	dev->hw_desc[idx]->p2 = dev->hw_phys_link[i];
520 	/* Fill remaining fields of hw_desc[1] */
521 	dev->hw_desc[idx]->hdr = sahara_aes_data_link_hdr(dev);
522 	dev->hw_desc[idx]->len1 = dev->total;
523 	dev->hw_desc[idx]->len2 = dev->total;
524 	dev->hw_desc[idx]->next = 0;
809 		dev->hw_desc[index]->hdr = sahara_sha_init_hdr(dev, rctx);
812 		dev->hw_desc[index]->hdr = SAHARA_HDR_MDHA_HASH;
814 	dev->hw_desc[index]->len1 = rctx->total;
815 	if (dev->hw_desc[index]->len1 == 0) {
817 		dev->hw_desc[index]->p1 = 0;
821 		dev->hw_desc[index]->p1 = dev->hw_phys_link[index];
829 	dev->hw_desc[index]->p2 = dev->hw_phys_link[i];
836 	dev->hw_desc[index]->len2 = result_len;
857 	dev->hw_desc[index]->hdr = sahara_sha_init_hdr(dev, rctx);
859 	dev->hw_desc[index]->len1 = rctx->context_size;
860 	dev->hw_desc[index]->p1 = dev->hw_phys_link[index];
861 	dev->hw_desc[index]->len2 = 0;
862 	dev->hw_desc[index]->p2 = 0;
945 		dev->hw_desc[0]->next = 0;
951 		dev->hw_desc[0]->next = dev->hw_phys_desc[1];
956 		dev->hw_desc[1]->next = 0;
1323 	dev->hw_desc[0] = dmam_alloc_coherent(&pdev->dev,
1326 	if (!dev->hw_desc[0])
1328 	dev->hw_desc[1] = dev->hw_desc[0] + 1;