marvell/octeontx2/otx2_cptlf.h

100 			 struct otx2_cptlf_info *lf);
114 	struct otx2_cptlf_info lf[OTX2_CPT_MAX_LFS_NUM];
135 		iq = &lfs->lf[i].iqueue;
156 		iq = &lfs->lf[i].iqueue;
189 		lf_q_base.u = lfs->lf[slot].iqueue.dma_addr;
195 static inline void otx2_cptlf_do_set_iqueue_size(struct otx2_cptlf_info *lf)
201 	otx2_cpt_write64(lf->lfs->reg_base, lf->lfs->blkaddr, lf->slot,
210 		otx2_cptlf_do_set_iqueue_size(&lfs->lf[slot]);
220 static inline void otx2_cptlf_do_disable_iqueue(struct otx2_cptlf_info *lf)
222 	void __iomem *reg_base = lf->lfs->reg_base;
223 	struct pci_dev *pdev = lf->lfs->pdev;
224 	u8 blkaddr = lf->lfs->blkaddr;
227 	u64 slot = lf->slot;
275 		otx2_cptlf_do_disable_iqueue(&lfs->lf[slot]);
280 static inline void otx2_cptlf_set_iqueue_enq(struct otx2_cptlf_info *lf,
283 	u8 blkaddr = lf->lfs->blkaddr;
286 	lf_ctl.u = otx2_cpt_read64(lf->lfs->reg_base, blkaddr, lf->slot,
291 	otx2_cpt_write64(lf->lfs->reg_base, blkaddr, lf->slot,
295 static inline void otx2_cptlf_enable_iqueue_enq(struct otx2_cptlf_info *lf)
297 	otx2_cptlf_set_iqueue_enq(lf, true);
300 static inline void otx2_cptlf_set_iqueue_exec(struct otx2_cptlf_info *lf,
304 	u8 blkaddr = lf->lfs->blkaddr;
306 	lf_inprog.u = otx2_cpt_read64(lf->lfs->reg_base, blkaddr, lf->slot,
311 	otx2_cpt_write64(lf->lfs->reg_base, blkaddr, lf->slot,
315 static inline void otx2_cptlf_set_ctx_flr_flush(struct otx2_cptlf_info *lf)
317 	u8 blkaddr = lf->lfs->blkaddr;
320 	val = otx2_cpt_read64(lf->lfs->reg_base, blkaddr, lf->slot,
324 	otx2_cpt_write64(lf->lfs->reg_base, blkaddr, lf->slot,
328 static inline void otx2_cptlf_enable_iqueue_exec(struct otx2_cptlf_info *lf)
330 	otx2_cptlf_set_iqueue_exec(lf, true);
333 static inline void otx2_cptlf_disable_iqueue_exec(struct otx2_cptlf_info *lf)
335 	otx2_cptlf_set_iqueue_exec(lf, false);
345 			otx2_cptlf_set_ctx_flr_flush(&lfs->lf[slot]);
347 		otx2_cptlf_enable_iqueue_exec(&lfs->lf[slot]);
348 		otx2_cptlf_enable_iqueue_enq(&lfs->lf[slot]);
374 				     u32 insts_num, struct otx2_cptlf_info *lf)
376 	void __iomem *lmtline = lf->lmtline;
407 		ret = otx2_lmt_flush(lf->ioreg);