hisilicon/sec/sec_drv.c

262 	writel_relaxed(regval, addr);
274 	writel_relaxed(regval, addr);
284 	writel_relaxed(0x7, base + SEC_ALGSUB_CLK_EN_REG);
301 	writel_relaxed(0x7, base + SEC_ALGSUB_CLK_DIS_REG);
319 	writel_relaxed(1, base + SEC_ALGSUB_RST_REQ_REG);
320 	writel_relaxed(1, base + SEC_ALGSUB_BUILD_RST_REQ_REG);
337 	writel_relaxed(1, base + SEC_ALGSUB_RST_DREQ_REG);
338 	writel_relaxed(1, base + SEC_ALGSUB_BUILD_RST_DREQ_REG);
365 	writel_relaxed(regval, addr);
380 		writel_relaxed(0x44cf9e, addr);
382 		writel_relaxed(0x4cfd9, addr);
394 	writel_relaxed(regval, addr);
406 	writel_relaxed(regval, addr);
419 	writel_relaxed(regval, addr);
432 	writel_relaxed(regval, addr);
445 	writel_relaxed(regval, addr);
454 		writel_relaxed(hash_mask[0],
465 	writel_relaxed(hash_mask,
485 	writel_relaxed(regval, addr);
499 	writel_relaxed(regval, addr);
505 	writel_relaxed(saa_int_mask,
515 	writel_relaxed((SEC_VMID | ((SEC_SID & 0xffff) << 8)),
533 	writel_relaxed(regval, addr);
550 	writel_relaxed(regval, addr);
563 	writel_relaxed(regval, base + SEC_Q_CFG_REG);
575 	writel_relaxed(regval, addr);
580 	writel_relaxed(upper_32_bits(addr), queue->regs + SEC_Q_BASE_HADDR_REG);
581 	writel_relaxed(lower_32_bits(addr), queue->regs + SEC_Q_BASE_LADDR_REG);
586 	writel_relaxed(upper_32_bits(addr),
588 	writel_relaxed(lower_32_bits(addr),
594 	writel_relaxed(upper_32_bits(addr),
596 	writel_relaxed(lower_32_bits(addr),
602 	writel_relaxed((u32)~0, queue->regs + SEC_Q_FLOW_INT_MKS_REG);
607 	writel_relaxed(0, queue->regs + SEC_Q_FLOW_INT_MKS_REG);
612 	writel_relaxed((u32)~0, queue->regs + SEC_Q_FAIL_INT_MSK_REG);
619 	writel_relaxed(0x0, queue->regs + SEC_QUEUE_ENB_REG);
627 	writel_relaxed(SEC_Q_INIT_AND_STAT_CLEAR, queue->regs + SEC_Q_INIT_REG);
628 	writel_relaxed(0x1, queue->regs + SEC_QUEUE_ENB_REG);
903 	writel_relaxed(1, queue->regs + SEC_Q_PROC_NUM_CFG_REG);
913 	writel_relaxed(0x100, queue->regs + SEC_Q_OT_TH_REG);
917 	writel_relaxed(SEC_Q_INIT_AND_STAT_CLEAR, queue->regs + SEC_Q_INIT_REG);
939 	writel_relaxed(GENMASK(info->num_saas - 1, 0),
960 	writel_relaxed((u32)~0, info->regs[SEC_SAA] + SEC_FSM_MAX_CNT_REG);
977 			writel_relaxed(0x3f,