crypto/hisilicon/qm.c

31 /* mailbox */
518 static void qm_mb_pre_init(struct qm_mailbox *mailbox, u8 cmd,
521 	mailbox->w0 = cpu_to_le16((cmd) |
524 	mailbox->queue_num = cpu_to_le16(queue);
525 	mailbox->base_l = cpu_to_le32(lower_32_bits(base));
526 	mailbox->base_h = cpu_to_le32(upper_32_bits(base));
527 	mailbox->rsvd = 0;
530 /* return 0 mailbox ready, -ETIMEDOUT hardware timeout */
541 /* 128 bit should be written to hardware at one time to trigger a mailbox */
568 static int qm_mb_nolock(struct hisi_qm *qm, struct qm_mailbox *mailbox)
574 		dev_err(&qm->pdev->dev, "QM mailbox is busy to start!\n");
579 	qm_mb_write(qm, mailbox);
582 		dev_err(&qm->pdev->dev, "QM mailbox operation timeout!\n");
589 		dev_err(&qm->pdev->dev, "QM mailbox operation failed!\n");
604 	struct qm_mailbox mailbox;
607 	qm_mb_pre_init(&mailbox, cmd, dma_addr, queue, op);
610 	ret = qm_mb_nolock(qm, &mailbox);
621 	struct qm_mailbox mailbox;
649 		dev_err(&qm->pdev->dev, "unknown mailbox cmd %u\n", cmd);
655 		dev_err(&qm->pdev->dev, "failed to send mailbox since qm is stop!\n");
663 	qm_mb_pre_init(&mailbox, cmd, xqc_dma, qp_id, op);
664 	ret = qm_mb_nolock(qm, &mailbox);
1450 	struct qm_mailbox mailbox;
1453 	qm_mb_pre_init(&mailbox, QM_MB_CMD_DST, 0, fun_num, 0);
1455 	ret = qm_mb_nolock(qm, &mailbox);
1575 	struct qm_mailbox mailbox;
1580 	qm_mb_pre_init(&mailbox, QM_MB_CMD_SRC, cmd, fun_num, 0);
1582 	ret = qm_mb_nolock(qm, &mailbox);
1612 	struct qm_mailbox mailbox;
1618 	qm_mb_pre_init(&mailbox, QM_MB_CMD_SRC, cmd, QM_MB_PING_ALL_VFS, 0);
1620 	/* PF sends command to all VFs by mailbox */
1621 	ret = qm_mb_nolock(qm, &mailbox);
1655 	struct qm_mailbox mailbox;
1660 	qm_mb_pre_init(&mailbox, QM_MB_CMD_SRC, cmd, 0, 0);
1662 	ret = qm_mb_nolock(qm, &mailbox);
2091  * If the device does not support stopping queue by sending mailbox,
3570 	/* reset mailbox qos val */
4744 	 * Get the msg from source by sending mailbox. Whether message is got
5022 			/* v2 starts to support get vft by mailbox */