Lines Matching defs:qm
48 int (*dump_fn)(struct hisi_qm *qm, char *cmd, char *info_name);
152 static void dump_show(struct hisi_qm *qm, void *info,
155 struct device *dev = &qm->pdev->dev;
167 static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)
169 struct device *dev = &qm->pdev->dev;
179 if (ret || qp_id >= qm->qp_num) {
180 dev_err(dev, "Please input qp num (0-%u)", qm->qp_num - 1);
184 ret = qm_set_and_get_xqc(qm, QM_MB_CMD_SQC, &sqc, qp_id, 1);
186 dump_show(qm, &sqc, sizeof(struct qm_sqc), name);
191 down_read(&qm->qps_lock);
192 if (qm->sqc) {
193 sqc_curr = qm->sqc + qp_id;
195 dump_show(qm, sqc_curr, sizeof(*sqc_curr), "SOFT SQC");
197 up_read(&qm->qps_lock);
202 static int qm_cqc_dump(struct hisi_qm *qm, char *s, char *name)
204 struct device *dev = &qm->pdev->dev;
214 if (ret || qp_id >= qm->qp_num) {
215 dev_err(dev, "Please input qp num (0-%u)", qm->qp_num - 1);
219 ret = qm_set_and_get_xqc(qm, QM_MB_CMD_CQC, &cqc, qp_id, 1);
221 dump_show(qm, &cqc, sizeof(struct qm_cqc), name);
226 down_read(&qm->qps_lock);
227 if (qm->cqc) {
228 cqc_curr = qm->cqc + qp_id;
230 dump_show(qm, cqc_curr, sizeof(*cqc_curr), "SOFT CQC");
232 up_read(&qm->qps_lock);
237 static int qm_eqc_aeqc_dump(struct hisi_qm *qm, char *s, char *name)
239 struct device *dev = &qm->pdev->dev;
262 ret = qm_set_and_get_xqc(qm, cmd, xeqc, 0, 1);
266 dump_show(qm, xeqc, size, name);
271 static int q_dump_param_parse(struct hisi_qm *qm, char *s,
274 struct device *dev = &qm->pdev->dev;
275 unsigned int qp_num = qm->qp_num;
311 static int qm_sq_dump(struct hisi_qm *qm, char *s, char *name)
313 u16 sq_depth = qm->qp_array->cq_depth;
319 ret = q_dump_param_parse(qm, s, &sqe_id, &qp_id, sq_depth);
323 sqe = kzalloc(qm->sqe_size * sq_depth, GFP_KERNEL);
327 qp = &qm->qp_array[qp_id];
328 memcpy(sqe, qp->sqe, qm->sqe_size * sq_depth);
329 sqe_curr = sqe + (u32)(sqe_id * qm->sqe_size);
330 memset(sqe_curr + qm->debug.sqe_mask_offset, QM_SQE_ADDR_MASK,
331 qm->debug.sqe_mask_len);
333 dump_show(qm, sqe_curr, qm->sqe_size, name);
340 static int qm_cq_dump(struct hisi_qm *qm, char *s, char *name)
347 ret = q_dump_param_parse(qm, s, &cqe_id, &qp_id, qm->qp_array->cq_depth);
351 qp = &qm->qp_array[qp_id];
353 dump_show(qm, cqe_curr, sizeof(struct qm_cqe), name);
358 static int qm_eq_aeq_dump(struct hisi_qm *qm, char *s, char *name)
360 struct device *dev = &qm->pdev->dev;
375 xeq_depth = qm->eq_depth;
378 xeq_depth = qm->aeq_depth;
387 down_read(&qm->qps_lock);
389 if (qm->eqe && !strcmp(name, "EQE")) {
390 xeqe = qm->eqe + xeqe_id;
391 } else if (qm->aeqe && !strcmp(name, "AEQE")) {
392 xeqe = qm->aeqe + xeqe_id;
398 dump_show(qm, xeqe, size, name);
401 up_read(&qm->qps_lock);
405 static int qm_dbg_help(struct hisi_qm *qm, char *s)
407 struct device *dev = &qm->pdev->dev;
463 static int qm_cmd_write_dump(struct hisi_qm *qm, const char *cmd_buf)
465 struct device *dev = &qm->pdev->dev;
481 ret = qm_dbg_help(qm, s);
488 ret = qm_cmd_dump_table[i].dump_fn(qm, s,
508 struct hisi_qm *qm = filp->private_data;
515 ret = hisi_qm_get_dfx_access(qm);
520 if (unlikely(atomic_read(&qm->status.flags) == QM_STOP)) {
542 ret = qm_cmd_write_dump(qm, cmd_buf);
553 hisi_qm_put_dfx_access(qm);
574 struct hisi_qm *qm = pci_get_drvdata(pdev);
580 ret = hisi_qm_get_dfx_access(qm);
589 hisi_qm_put_dfx_access(qm);
595 struct hisi_qm *qm = s->private;
598 if (qm->fun_type == QM_HW_PF) {
606 regset.base = qm->io_base;
607 regset.dev = &qm->pdev->dev;
616 static u32 current_q_read(struct hisi_qm *qm)
618 return readl(qm->io_base + QM_DFX_SQE_CNT_VF_SQN) >> QM_DFX_QN_SHIFT;
621 static int current_q_write(struct hisi_qm *qm, u32 val)
625 if (val >= qm->debug.curr_qm_qp_num)
629 (readl(qm->io_base + QM_DFX_SQE_CNT_VF_SQN) & CURRENT_FUN_MASK);
630 writel(tmp, qm->io_base + QM_DFX_SQE_CNT_VF_SQN);
633 (readl(qm->io_base + QM_DFX_CQE_CNT_VF_CQN) & CURRENT_FUN_MASK);
634 writel(tmp, qm->io_base + QM_DFX_CQE_CNT_VF_CQN);
639 static u32 clear_enable_read(struct hisi_qm *qm)
641 return readl(qm->io_base + QM_DFX_CNT_CLR_CE);
645 static int clear_enable_write(struct hisi_qm *qm, u32 rd_clr_ctrl)
650 writel(rd_clr_ctrl, qm->io_base + QM_DFX_CNT_CLR_CE);
655 static u32 current_qm_read(struct hisi_qm *qm)
657 return readl(qm->io_base + QM_DFX_MB_CNT_VF);
660 static int qm_get_vf_qp_num(struct hisi_qm *qm, u32 fun_num)
663 u32 num_vfs = qm->vfs_num;
665 vfq_num = (qm->ctrl_qp_num - qm->qp_num) / num_vfs;
666 if (vfq_num >= qm->max_qp_num)
667 return qm->max_qp_num;
669 remain_q_num = (qm->ctrl_qp_num - qm->qp_num) % num_vfs;
670 if (vfq_num + remain_q_num <= qm->max_qp_num)
680 static int current_qm_write(struct hisi_qm *qm, u32 val)
684 if (val > qm->vfs_num)
689 qm->debug.curr_qm_qp_num = qm->qp_num;
691 qm->debug.curr_qm_qp_num = qm_get_vf_qp_num(qm, val);
693 writel(val, qm->io_base + QM_DFX_MB_CNT_VF);
694 writel(val, qm->io_base + QM_DFX_DB_CNT_VF);
697 (readl(qm->io_base + QM_DFX_SQE_CNT_VF_SQN) & CURRENT_Q_MASK);
698 writel(tmp, qm->io_base + QM_DFX_SQE_CNT_VF_SQN);
701 (readl(qm->io_base + QM_DFX_CQE_CNT_VF_CQN) & CURRENT_Q_MASK);
702 writel(tmp, qm->io_base + QM_DFX_CQE_CNT_VF_CQN);
712 struct hisi_qm *qm = file_to_qm(file);
717 ret = hisi_qm_get_dfx_access(qm);
724 val = current_qm_read(qm);
727 val = current_q_read(qm);
730 val = clear_enable_read(qm);
737 hisi_qm_put_dfx_access(qm);
743 hisi_qm_put_dfx_access(qm);
752 struct hisi_qm *qm = file_to_qm(file);
772 ret = hisi_qm_get_dfx_access(qm);
779 ret = current_qm_write(qm, val);
782 ret = current_q_write(qm, val);
785 ret = clear_enable_write(qm, val);
792 hisi_qm_put_dfx_access(qm);
807 static void dfx_regs_uninit(struct hisi_qm *qm,
820 static struct dfx_diff_registers *dfx_regs_init(struct hisi_qm *qm,
845 diff_regs[i].regs[j] = readl(qm->io_base + base_offset);
860 static int qm_diff_regs_init(struct hisi_qm *qm,
863 qm->debug.qm_diff_regs = dfx_regs_init(qm, qm_diff_regs, ARRAY_SIZE(qm_diff_regs));
864 if (IS_ERR(qm->debug.qm_diff_regs))
865 return PTR_ERR(qm->debug.qm_diff_regs);
867 qm->debug.acc_diff_regs = dfx_regs_init(qm, dregs, reg_len);
868 if (IS_ERR(qm->debug.acc_diff_regs)) {
869 dfx_regs_uninit(qm, qm->debug.qm_diff_regs, ARRAY_SIZE(qm_diff_regs));
870 return PTR_ERR(qm->debug.acc_diff_regs);
876 static void qm_last_regs_uninit(struct hisi_qm *qm)
878 struct qm_debug *debug = &qm->debug;
880 if (qm->fun_type == QM_HW_VF || !debug->qm_last_words)
887 static int qm_last_regs_init(struct hisi_qm *qm)
890 struct qm_debug *debug = &qm->debug;
893 if (qm->fun_type == QM_HW_VF)
901 debug->qm_last_words[i] = readl_relaxed(qm->io_base +
908 static void qm_diff_regs_uninit(struct hisi_qm *qm, u32 reg_len)
910 dfx_regs_uninit(qm, qm->debug.acc_diff_regs, reg_len);
911 dfx_regs_uninit(qm, qm->debug.qm_diff_regs, ARRAY_SIZE(qm_diff_regs));
916 * @qm: device qm handle.
920 int hisi_qm_regs_debugfs_init(struct hisi_qm *qm,
925 if (!qm || !dregs)
928 if (qm->fun_type != QM_HW_PF)
931 ret = qm_last_regs_init(qm);
933 dev_info(&qm->pdev->dev, "failed to init qm words memory!\n");
937 ret = qm_diff_regs_init(qm, dregs, reg_len);
939 qm_last_regs_uninit(qm);
949 * @qm: device qm handle.
952 void hisi_qm_regs_debugfs_uninit(struct hisi_qm *qm, u32 reg_len)
954 if (!qm || qm->fun_type != QM_HW_PF)
957 qm_diff_regs_uninit(qm, reg_len);
958 qm_last_regs_uninit(qm);
964 * @qm: device qm handle.
969 void hisi_qm_acc_diff_regs_dump(struct hisi_qm *qm, struct seq_file *s,
975 if (!qm || !s || !dregs)
978 ret = hisi_qm_get_dfx_access(qm);
982 down_read(&qm->qps_lock);
989 val = readl(qm->io_base + base_offset);
995 up_read(&qm->qps_lock);
997 hisi_qm_put_dfx_access(qm);
1001 void hisi_qm_show_last_dfx_regs(struct hisi_qm *qm)
1003 struct qm_debug *debug = &qm->debug;
1004 struct pci_dev *pdev = qm->pdev;
1008 if (qm->fun_type == QM_HW_VF || !debug->qm_last_words)
1012 val = readl_relaxed(qm->io_base + qm_dfx_regs[i].offset);
1021 struct hisi_qm *qm = s->private;
1023 hisi_qm_acc_diff_regs_dump(qm, s, qm->debug.qm_diff_regs,
1032 struct hisi_qm *qm = s->private;
1037 ret = hisi_qm_get_dfx_access(qm);
1039 val = readl(qm->io_base + QM_IN_IDLE_ST_REG);
1040 hisi_qm_put_dfx_access(qm);
1057 struct hisi_qm *qm = filp->private_data;
1061 val = atomic_read(&qm->status.flags);
1073 static void qm_create_debugfs_file(struct hisi_qm *qm, struct dentry *dir,
1076 struct debugfs_file *file = qm->debug.files + index;
1083 file->debug = &qm->debug;
1107 * hisi_qm_debug_init() - Initialize qm related debugfs files.
1108 * @qm: The qm for which we want to add debugfs files.
1110 * Create qm related debugfs files.
1112 void hisi_qm_debug_init(struct hisi_qm *qm)
1114 struct dfx_diff_registers *qm_regs = qm->debug.qm_diff_regs;
1115 struct qm_dev_dfx *dev_dfx = &qm->debug.dev_dfx;
1116 struct qm_dfx *dfx = &qm->debug.dfx;
1121 qm_d = debugfs_create_dir("qm", qm->debug.debug_root);
1122 qm->debug.qm_d = qm_d;
1125 if (qm->fun_type == QM_HW_PF) {
1126 debugfs_create_file("qm_state", 0444, qm->debug.qm_d,
1127 qm, &qm_state_fops);
1129 qm_create_debugfs_file(qm, qm->debug.debug_root, CURRENT_QM);
1131 qm_create_debugfs_file(qm, qm->debug.qm_d, i);
1135 debugfs_create_file("diff_regs", 0444, qm->debug.qm_d,
1136 qm, &qm_diff_regs_fops);
1138 debugfs_create_file("regs", 0444, qm->debug.qm_d, qm, &qm_regs_fops);
1140 debugfs_create_file("cmd", 0600, qm->debug.qm_d, qm, &qm_cmd_fops);
1142 debugfs_create_file("status", 0444, qm->debug.qm_d, qm,
1145 debugfs_create_u32("dev_state", 0444, qm->debug.qm_d, &dev_dfx->dev_state);
1146 debugfs_create_u32("dev_timeout", 0644, qm->debug.qm_d, &dev_dfx->dev_timeout);
1157 if (test_bit(QM_SUPPORT_FUNC_QOS, &qm->caps))
1158 hisi_qm_set_algqos_init(qm);
1163 * hisi_qm_debug_regs_clear() - clear qm debug related registers.
1164 * @qm: The qm for which we want to clear its debug registers.
1166 void hisi_qm_debug_regs_clear(struct hisi_qm *qm)
1172 writel(0x0, qm->io_base + QM_DFX_MB_CNT_VF);
1173 writel(0x0, qm->io_base + QM_DFX_DB_CNT_VF);
1176 writel(0x0, qm->io_base + QM_DFX_SQE_CNT_VF_SQN);
1177 writel(0x0, qm->io_base + QM_DFX_CQE_CNT_VF_CQN);
1183 writel(0x1, qm->io_base + QM_DFX_CNT_CLR_CE);
1187 readl(qm->io_base + regs->offset);
1192 writel(0x0, qm->io_base + QM_DFX_CNT_CLR_CE);