crypto/ccree/cc_driver.c

102 static void init_cc_cache_params(struct cc_drvdata *drvdata)
104 	struct device *dev = drvdata_to_dev(drvdata);
109 	cache_params = cc_ioread(drvdata, CC_REG(AXIM_CACHE_PARAMS));
113 	val = drvdata->coherent ? 0xb : 0x2;
127 	drvdata->cache_params = cache_params;
131 	if (drvdata->hw_rev <= CC_HW_REV_710)
135 	ace_const = cc_ioread(drvdata, CC_REG(AXIM_ACE_CONST));
139 	val = drvdata->coherent ? 0x2 : 0x3;
151 	drvdata->ace_const = ace_const;
154 static u32 cc_read_idr(struct cc_drvdata *drvdata, const u32 *idr_offsets)
163 		idr.regs[i] = cc_ioread(drvdata, idr_offsets[i]);
183 	struct cc_drvdata *drvdata = (struct cc_drvdata *)dev_id;
184 	struct device *dev = drvdata_to_dev(drvdata);
194 	irr = cc_ioread(drvdata, CC_REG(HOST_IRR));
200 	imr = cc_ioread(drvdata, CC_REG(HOST_IMR));
203 	cc_iowrite(drvdata, CC_REG(HOST_ICR), irr);
205 	drvdata->irq = irr;
207 	if (irr & drvdata->comp_mask) {
211 		cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | drvdata->comp_mask);
212 		irr &= ~drvdata->comp_mask;
213 		complete_request(drvdata);
221 		cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | CC_GPR0_IRQ_MASK);
223 		fips_handler(drvdata);
231 		axi_err = cc_ioread(drvdata, CC_REG(AXIM_MON_ERR));
247 bool cc_wait_for_reset_completion(struct cc_drvdata *drvdata)
253 	if (drvdata->hw_rev <= CC_HW_REV_712)
260 		val = cc_ioread(drvdata, CC_REG(NVM_IS_IDLE));
272 int init_cc_regs(struct cc_drvdata *drvdata)
275 	struct device *dev = drvdata_to_dev(drvdata);
279 	if (drvdata->hw_rev <= CC_HW_REV_712) {
280 		val = cc_ioread(drvdata, CC_REG(AXIM_CFG));
281 		cc_iowrite(drvdata, CC_REG(AXIM_CFG), val & ~CC_AXI_IRQ_MASK);
283 			cc_ioread(drvdata, CC_REG(AXIM_CFG)));
287 	val = cc_ioread(drvdata, CC_REG(HOST_IRR));
289 	cc_iowrite(drvdata, CC_REG(HOST_ICR), val);
292 	val = drvdata->comp_mask | CC_AXI_ERR_IRQ_MASK;
294 	if (drvdata->hw_rev >= CC_HW_REV_712)
297 	cc_iowrite(drvdata, CC_REG(HOST_IMR), ~val);
299 	cc_iowrite(drvdata, CC_REG(AXIM_CACHE_PARAMS), drvdata->cache_params);
300 	if (drvdata->hw_rev >= CC_HW_REV_712)
301 		cc_iowrite(drvdata, CC_REG(AXIM_ACE_CONST), drvdata->ace_const);
577 void fini_cc_regs(struct cc_drvdata *drvdata)
580 	cc_iowrite(drvdata, CC_REG(HOST_IMR), 0xFFFFFFFF);
586 	struct cc_drvdata *drvdata =
589 	cc_aead_free(drvdata);
590 	cc_cipher_free(drvdata);
591 	cc_hash_free(drvdata);
592 	cc_buffer_mgr_fini(drvdata);
593 	cc_req_mgr_fini(drvdata);
594 	cc_fips_fini(drvdata);
595 	cc_debugfs_fini(drvdata);
596 	fini_cc_regs(drvdata);
600 	clk_disable_unprepare(drvdata->clk);
603 unsigned int cc_get_default_hash_len(struct cc_drvdata *drvdata)
605 	if (drvdata->hw_rev >= CC_HW_REV_712)