cavium/cpt/cptpf_mbox.c

8 static void cpt_send_msg_to_vf(struct cpt_device *cpt, int vf,
12 	cpt_write_csr64(cpt->reg_base, CPTX_PF_VFX_MBOXX(0, vf, 1),
14 	cpt_write_csr64(cpt->reg_base, CPTX_PF_VFX_MBOXX(0, vf, 0), mbx->msg);
18  * @vf: VF to which ACK to be sent
20 static void cpt_mbox_send_ack(struct cpt_device *cpt, int vf,
25 	cpt_send_msg_to_vf(cpt, vf, mbx);
28 static void cpt_clear_mbox_intr(struct cpt_device *cpt, u32 vf)
31 	cpt_write_csr64(cpt->reg_base, CPTX_PF_MBOX_INTX(0, 0), (1 << vf));
37 static void cpt_cfg_qlen_for_vf(struct cpt_device *cpt, int vf, u32 size)
41 	pf_qx_ctl.u = cpt_read_csr64(cpt->reg_base, CPTX_PF_QX_CTL(0, vf));
44 	cpt_write_csr64(cpt->reg_base, CPTX_PF_QX_CTL(0, vf), pf_qx_ctl.u);
50 static void cpt_cfg_vq_priority(struct cpt_device *cpt, int vf, u32 pri)
54 	pf_qx_ctl.u = cpt_read_csr64(cpt->reg_base, CPTX_PF_QX_CTL(0, vf));
56 	cpt_write_csr64(cpt->reg_base, CPTX_PF_QX_CTL(0, vf), pf_qx_ctl.u);
86 static void cpt_handle_mbox_intr(struct cpt_device *cpt, int vf)
88 	struct cpt_vf_info *vfx = &cpt->vfinfo[vf];
96 	mbx.msg  = cpt_read_csr64(cpt->reg_base, CPTX_PF_VFX_MBOXX(0, vf, 0));
97 	mbx.data = cpt_read_csr64(cpt->reg_base, CPTX_PF_VFX_MBOXX(0, vf, 1));
98 	dev_dbg(dev, "%s: Mailbox msg 0x%llx from VF%d", __func__, mbx.msg, vf);
103 		cpt_mbox_send_ack(cpt, vf, &mbx);
107 		mbx.data = vf;
108 		cpt_send_msg_to_vf(cpt, vf, &mbx);
114 		cpt_mbox_send_ack(cpt, vf, &mbx);
118 		cpt_cfg_qlen_for_vf(cpt, vf, vfx->qlen);
119 		cpt_mbox_send_ack(cpt, vf, &mbx);
122 		vftype = cpt_bind_vq_to_grp(cpt, vf, (u8)mbx.data);
125 				vf, mbx.data);
128 				vf, mbx.data);
131 			cpt_send_msg_to_vf(cpt, vf, &mbx);
136 		cpt_cfg_vq_priority(cpt, vf, vfx->priority);
137 		cpt_mbox_send_ack(cpt, vf, &mbx);
141 			vf, mbx.msg);
149 	u8  vf;
153 	for (vf = 0; vf < CPT_MAX_VF_NUM; vf++) {
154 		if (intr & (1ULL << vf)) {
155 			dev_dbg(&cpt->pdev->dev, "Intr from VF %d\n", vf);
156 			cpt_handle_mbox_intr(cpt, vf);
157 			cpt_clear_mbox_intr(cpt, vf);