drivers/cpufreq/powernow-k8.c

96  * Update the global current fid / vid values from the status msr.
134 	u8 fid, vid;
137 	vid = hi & MSR_S_HI_CURRENT_VID;
139 	lo = fid | (vid << MSR_C_LO_VID_SHIFT);
175 		pr_err("vid change on fid trans, old 0x%x, new 0x%x\n",
189 /* Write a new vid to the hardware */
190 static int write_new_vid(struct powernow_k8_data *data, u32 vid)
196 	if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
197 		pr_err("internal error - overflow on vid write\n");
202 	lo |= (vid << MSR_C_LO_VID_SHIFT);
205 	pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
206 		vid, lo, STOP_GRANT_5NS);
217 		pr_err("fid changed on vid trans, old 0x%x new 0x%x\n",
222 	if (vid != data->currvid) {
223 		pr_err("vid trans failed, vid 0x%x, curr 0x%x\n",
224 				vid, data->currvid);
232  * Reduce the vid by the max of step or reqvid.
233  * Decreasing vid codes represent increasing voltages:
234  * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
250 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
273 	pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
301 		pr_debug("ph1: curr 0x%x, req vid 0x%x\n",
312 			pr_debug("ph1: changing vid for rvo, req 0x%x\n",
394 		pr_err("ph2: vid changed, save 0x%x, curr 0x%x\n",
405 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
427 			pr_err("ph3: failed vid transition\n, req 0x%x, curr 0x%x",
499 		if (pst[j].vid > LEAST_VID) {
500 			pr_err(FW_BUG "vid %d invalid : 0x%x\n", j,
501 				pst[j].vid);
504 		if (pst[j].vid < data->rvo) {
505 			/* vid + rvo >= 0 */
506 			pr_err(FW_BUG "0 vid exceeded with pstate %d\n", j);
509 		if (pst[j].vid < maxvid + data->rvo) {
510 			/* vid + rvo >= maxvid */
549 			pr_info("fid 0x%x (%d MHz), vid 0x%x\n",
595 		powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */
614 		    (pst[j].vid == data->currvid))
617 	pr_debug("currfid/vid do not match PST, ignoring\n");
805 		u32 vid;
812 			vid = (status >> VID_SHIFT) & EXT_VID_MASK;
816 			vid = (control >> VID_SHIFT) & VID_MASK;
819 		pr_debug("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
821 		index = fid | (vid<<8);
836 		if (vid == VID_OFF) {
837 			pr_debug("invalid vid %u, ignoring\n", vid);
879 /* Take a frequency, and issue the fid/vid transition command */
885 	u32 vid = 0;
891 	/* fid/vid correctness check for k8 */
893 	 * the cpufreq frequency table in find_psb_table, vid
897 	vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8;
899 	pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
904 	if ((data->currvid == vid) && (data->currfid == fid)) {
905 		pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n",
906 			fid, vid);
910 	pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n",
911 		smp_processor_id(), fid, vid);
916 	res = transition_fid_vid(data, fid, vid);
955 	pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
960 		pr_info("error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
1075 	pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",