Lines Matching refs:iobase

117  * dev->iobase Register Map
175 outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG);
176 inl(dev->iobase + APCI1564_DI_INT_STATUS_REG);
177 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG);
178 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG);
181 outl(0x0, dev->iobase + APCI1564_DO_REG);
182 outl(0x0, dev->iobase + APCI1564_DO_INT_CTRL_REG);
185 addi_watchdog_reset(dev->iobase + APCI1564_WDOG_IOBASE);
192 unsigned long iobase = devpriv->counters + ADDI_TCW_CTRL_REG;
195 outl(0x0, iobase + APCI1564_COUNTER(0));
196 outl(0x0, iobase + APCI1564_COUNTER(1));
197 outl(0x0, iobase + APCI1564_COUNTER(2));
214 status = inl(dev->iobase + APCI1564_DI_IRQ_REG);
217 s->state = inl(dev->iobase + APCI1564_DI_INT_STATUS_REG);
223 dev->iobase + APCI1564_DI_IRQ_REG);
224 outl(status, dev->iobase + APCI1564_DI_IRQ_REG);
239 unsigned long iobase;
241 iobase = devpriv->counters + APCI1564_COUNTER(chan);
243 status = inl(iobase + ADDI_TCW_IRQ_REG);
248 ctrl = inl(iobase + ADDI_TCW_CTRL_REG);
249 outl(0x0, iobase + ADDI_TCW_CTRL_REG);
250 outl(ctrl, iobase + ADDI_TCW_CTRL_REG);
268 data[1] = inl(dev->iobase + APCI1564_DI_REG);
278 s->state = inl(dev->iobase + APCI1564_DO_REG);
281 outl(s->state, dev->iobase + APCI1564_DO_REG);
293 data[1] = inl(dev->iobase + APCI1564_DO_INT_STATUS_REG) & 3;
355 outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG);
356 inl(dev->iobase + APCI1564_DI_INT_STATUS_REG);
357 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG);
358 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG);
473 outl(devpriv->mode1, dev->iobase + APCI1564_DI_INT_MODE1_REG);
474 outl(devpriv->mode2, dev->iobase + APCI1564_DI_INT_MODE2_REG);
475 outl(devpriv->ctrl, dev->iobase + APCI1564_DI_IRQ_REG);
483 outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG);
484 inl(dev->iobase + APCI1564_DI_INT_STATUS_REG);
485 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG);
486 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG);
579 unsigned long iobase = devpriv->counters + APCI1564_COUNTER(chan);
584 val = inl(iobase + ADDI_TCW_CTRL_REG);
586 outl(data[1], iobase + ADDI_TCW_RELOAD_REG);
587 outl(val, iobase + ADDI_TCW_CTRL_REG);
590 val = inl(iobase + ADDI_TCW_CTRL_REG);
592 outl(val, iobase + ADDI_TCW_CTRL_REG);
600 outl(data[1], iobase + ADDI_TCW_CTRL_REG);
604 val = inl(iobase + ADDI_TCW_CTRL_REG);
609 val = inl(iobase + ADDI_TCW_STATUS_REG);
629 unsigned long iobase = devpriv->counters + APCI1564_COUNTER(chan);
635 outl(val, iobase + ADDI_TCW_RELOAD_REG);
648 unsigned long iobase = devpriv->counters + APCI1564_COUNTER(chan);
653 data[i] = inl(iobase + ADDI_TCW_VAL_REG);
680 dev->iobase = pci_resource_start(pcidev, 1) +
685 dev->iobase = devpriv->eeprom + APCI1564_REV2_MAIN_IOBASE;
768 ret = addi_watchdog_init(s, dev->iobase + APCI1564_WDOG_IOBASE);
786 if (dev->iobase)