Lines Matching refs:devpriv

141  * devpriv->timer Register Map (see addi_tcw.h for register/bit defines)
147 * devpriv->counters Register Map (see addi_tcw.h for register/bit defines)
172 struct apci1564_private *devpriv = dev->private;
188 outl(0x0, devpriv->timer + ADDI_TCW_CTRL_REG);
189 outl(0x0, devpriv->timer + ADDI_TCW_RELOAD_REG);
191 if (devpriv->counters) {
192 unsigned long iobase = devpriv->counters + ADDI_TCW_CTRL_REG;
206 struct apci1564_private *devpriv = dev->private;
227 status = inl(devpriv->timer + ADDI_TCW_IRQ_REG);
232 ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG);
233 outl(0x0, devpriv->timer + ADDI_TCW_CTRL_REG);
234 outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG);
237 if (devpriv->counters) {
241 iobase = devpriv->counters + APCI1564_COUNTER(chan);
333 struct apci1564_private *devpriv = dev->private;
352 devpriv->ctrl = 0;
353 devpriv->mode1 = 0;
354 devpriv->mode2 = 0;
361 if (devpriv->ctrl != APCI1564_DI_IRQ_ENA) {
363 devpriv->ctrl = APCI1564_DI_IRQ_ENA;
365 devpriv->mode1 = 0;
366 devpriv->mode2 = 0;
369 devpriv->mode1 &= oldmask;
370 devpriv->mode2 &= oldmask;
373 devpriv->mode1 |= himask;
374 devpriv->mode2 |= lomask;
377 if (devpriv->ctrl != (APCI1564_DI_IRQ_ENA |
380 devpriv->ctrl = APCI1564_DI_IRQ_ENA |
383 devpriv->mode1 = 0;
384 devpriv->mode2 = 0;
387 devpriv->mode1 &= oldmask;
388 devpriv->mode2 &= oldmask;
391 devpriv->mode1 |= himask;
392 devpriv->mode2 |= lomask;
399 devpriv->mode1 &= APCI1564_DI_INT_MODE_MASK;
400 devpriv->mode2 &= APCI1564_DI_INT_MODE_MASK;
465 struct apci1564_private *devpriv = dev->private;
467 if (!devpriv->ctrl && !(devpriv->mode1 || devpriv->mode2)) {
473 outl(devpriv->mode1, dev->iobase + APCI1564_DI_INT_MODE1_REG);
474 outl(devpriv->mode2, dev->iobase + APCI1564_DI_INT_MODE2_REG);
475 outl(devpriv->ctrl, dev->iobase + APCI1564_DI_IRQ_REG);
496 struct apci1564_private *devpriv = dev->private;
503 outl(data[1], devpriv->timer + ADDI_TCW_RELOAD_REG);
505 devpriv->timer + ADDI_TCW_CTRL_REG);
508 outl(0x0, devpriv->timer + ADDI_TCW_CTRL_REG);
512 val = inl(devpriv->timer + ADDI_TCW_CTRL_REG);
517 val = inl(devpriv->timer + ADDI_TCW_STATUS_REG);
526 outl(data[1], devpriv->timer + ADDI_TCW_TIMEBASE_REG);
527 outl(data[2], devpriv->timer + ADDI_TCW_RELOAD_REG);
530 data[1] = inl(devpriv->timer + ADDI_TCW_TIMEBASE_REG);
531 data[2] = inl(devpriv->timer + ADDI_TCW_RELOAD_REG);
545 struct apci1564_private *devpriv = dev->private;
551 outl(val, devpriv->timer + ADDI_TCW_RELOAD_REG);
562 struct apci1564_private *devpriv = dev->private;
567 data[i] = inl(devpriv->timer + ADDI_TCW_VAL_REG);
577 struct apci1564_private *devpriv = dev->private;
579 unsigned long iobase = devpriv->counters + APCI1564_COUNTER(chan);
627 struct apci1564_private *devpriv = dev->private;
629 unsigned long iobase = devpriv->counters + APCI1564_COUNTER(chan);
646 struct apci1564_private *devpriv = dev->private;
648 unsigned long iobase = devpriv->counters + APCI1564_COUNTER(chan);
662 struct apci1564_private *devpriv;
667 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
668 if (!devpriv)
676 devpriv->eeprom = pci_resource_start(pcidev, 0);
677 val = inl(devpriv->eeprom + APCI1564_EEPROM_REG);
682 devpriv->timer = devpriv->eeprom + APCI1564_REV1_TIMER_IOBASE;
685 dev->iobase = devpriv->eeprom + APCI1564_REV2_MAIN_IOBASE;
686 devpriv->timer = devpriv->eeprom + APCI1564_REV2_TIMER_IOBASE;
687 devpriv->counters = pci_resource_start(pcidev, 1);
753 if (devpriv->counters) {