Lines Matching refs:writel_relaxed
118 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET);
120 writel_relaxed(cycles, timer->base_addr + TTC_INTR_VAL_OFFSET);
128 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET);
205 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET);
233 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET);
301 writel_relaxed(ttccs->scale_clk_ctrl_reg_new,
311 writel_relaxed(ttccs->scale_clk_ctrl_reg_new,
321 writel_relaxed(ttccs->scale_clk_ctrl_reg_old,
372 writel_relaxed(0x0, ttccs->ttc.base_addr + TTC_IER_OFFSET);
373 writel_relaxed(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN,
375 writel_relaxed(CNT_CNTRL_RESET,
460 writel_relaxed(0x23, ttcce->ttc.base_addr + TTC_CNT_CNTRL_OFFSET);
461 writel_relaxed(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN,
463 writel_relaxed(0x1, ttcce->ttc.base_addr + TTC_IER_OFFSET);