drivers/clocksource/ingenic-timer.c

14 #include <linux/mfd/ingenic-tcu.h>
23 #include <dt-bindings/clock/ingenic,tcu.h>
53 	struct ingenic_tcu *tcu = ingenic_tcu;
56 	regmap_read(tcu->map, TCU_REG_TCNTc(tcu->cs_channel), &count);
81 	struct ingenic_tcu *tcu = to_ingenic_tcu(timer);
83 	regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel));
92 	struct ingenic_tcu *tcu = to_ingenic_tcu(timer);
97 	regmap_write(tcu->map, TCU_REG_TDFRc(timer->channel), next);
98 	regmap_write(tcu->map, TCU_REG_TCNTc(timer->channel), 0);
99 	regmap_write(tcu->map, TCU_REG_TESR, BIT(timer->channel));
114 	struct ingenic_tcu *tcu = to_ingenic_tcu(timer);
117 	regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel));
142 	struct ingenic_tcu *tcu = ingenic_tcu;
143 	struct ingenic_tcu_timer *timer = &tcu->timers[cpu];
149 	timer->clk = ingenic_tcu_get_clock(tcu->np, timer->channel);
163 	domain = irq_find_host(tcu->np);
204 					       struct ingenic_tcu *tcu)
206 	unsigned int channel = tcu->cs_channel;
207 	struct clocksource *cs = &tcu->cs;
211 	tcu->cs_clk = ingenic_tcu_get_clock(np, channel);
212 	if (IS_ERR(tcu->cs_clk))
213 		return PTR_ERR(tcu->cs_clk);
215 	err = clk_prepare_enable(tcu->cs_clk);
219 	rate = clk_get_rate(tcu->cs_clk);
226 	regmap_update_bits(tcu->map, TCU_REG_TCSRc(channel),
230 	regmap_write(tcu->map, TCU_REG_TDFRc(channel), 0xffff);
231 	regmap_write(tcu->map, TCU_REG_TCNTc(channel), 0);
234 	regmap_write(tcu->map, TCU_REG_TESR, BIT(channel));
249 	clk_disable_unprepare(tcu->cs_clk);
251 	clk_put(tcu->cs_clk);
264 	{ .compatible = "ingenic,jz4740-tcu", .data = &jz4740_soc_info, },
265 	{ .compatible = "ingenic,jz4725b-tcu", .data = &jz4725b_soc_info, },
266 	{ .compatible = "ingenic,jz4760-tcu", .data = &jz4740_soc_info, },
267 	{ .compatible = "ingenic,jz4770-tcu", .data = &jz4740_soc_info, },
268 	{ .compatible = "ingenic,x1000-tcu", .data = &jz4740_soc_info, },
277 	struct ingenic_tcu *tcu;
289 	tcu = kzalloc(struct_size(tcu, timers, num_possible_cpus()),
291 	if (!tcu)
298 	tcu->pwm_channels_mask = GENMASK(soc_info->num_channels - 1,
301 			     (u32 *)&tcu->pwm_channels_mask);
304 	if (hweight8(tcu->pwm_channels_mask) >
307 			tcu->pwm_channels_mask);
312 	tcu->map = map;
313 	tcu->np = np;
314 	ingenic_tcu = tcu;
317 		timer = &tcu->timers[cpu];
320 		timer->channel = find_next_zero_bit(&tcu->pwm_channels_mask,
326 	tcu->cs_channel = find_next_zero_bit(&tcu->pwm_channels_mask,
330 	ret = ingenic_tcu_clocksource_init(np, tcu);
345 	rate = clk_get_rate(tcu->cs_clk);
351 	clocksource_unregister(&tcu->cs);
352 	clk_disable_unprepare(tcu->cs_clk);
353 	clk_put(tcu->cs_clk);
355 	kfree(tcu);
359 TIMER_OF_DECLARE(jz4740_tcu_intc,  "ingenic,jz4740-tcu",  ingenic_tcu_init);
360 TIMER_OF_DECLARE(jz4725b_tcu_intc, "ingenic,jz4725b-tcu", ingenic_tcu_init);
361 TIMER_OF_DECLARE(jz4760_tcu_intc,  "ingenic,jz4760-tcu",  ingenic_tcu_init);
362 TIMER_OF_DECLARE(jz4770_tcu_intc,  "ingenic,jz4770-tcu",  ingenic_tcu_init);
363 TIMER_OF_DECLARE(x1000_tcu_intc,  "ingenic,x1000-tcu",  ingenic_tcu_init);
374 	struct ingenic_tcu *tcu = dev_get_drvdata(dev);
377 	clk_disable(tcu->cs_clk);
380 		clk_disable(tcu->timers[cpu].clk);
387 	struct ingenic_tcu *tcu = dev_get_drvdata(dev);
392 		ret = clk_enable(tcu->timers[cpu].clk);
397 	ret = clk_enable(tcu->cs_clk);
405 		clk_disable(tcu->timers[cpu - 1].clk);
417 		.name	= "ingenic-tcu-timer",