drivers/clocksource/dw_apb_timer.c

322  * @dw_cs:	The clocksource to start.
327 void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs)
333 	u32 ctrl = apbt_readl(&dw_cs->timer, APBTMR_N_CONTROL);
336 	apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL);
337 	apbt_writel(&dw_cs->timer, ~0, APBTMR_N_LOAD_COUNT);
341 	apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL);
343 	dw_apb_clocksource_read(dw_cs);
349 	struct dw_apb_clocksource *dw_cs =
352 	current_count = apbt_readl_relaxed(&dw_cs->timer,
360 	struct dw_apb_clocksource *dw_cs =
363 	dw_apb_clocksource_start(dw_cs);
382 	struct dw_apb_clocksource *dw_cs = kzalloc(sizeof(*dw_cs), GFP_KERNEL);
384 	if (!dw_cs)
387 	dw_cs->timer.base = base;
388 	dw_cs->timer.freq = freq;
389 	dw_cs->cs.name = name;
390 	dw_cs->cs.rating = rating;
391 	dw_cs->cs.read = __apbt_read_clocksource;
392 	dw_cs->cs.mask = CLOCKSOURCE_MASK(32);
393 	dw_cs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
394 	dw_cs->cs.resume = apbt_restart_clocksource;
396 	return dw_cs;
402  * @dw_cs:	The clocksource to register.
404 void dw_apb_clocksource_register(struct dw_apb_clocksource *dw_cs)
406 	clocksource_register_hz(&dw_cs->cs, dw_cs->timer.freq);
412  * @dw_cs:	The clocksource to read.
414 u64 dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs)
416 	return (u64)~apbt_readl(&dw_cs->timer, APBTMR_N_CURRENT_VALUE);