drivers/clocksource/clksrc_st_lpc.c

28 } ddata;
32 	writel_relaxed(0, ddata.base + LPC_LPT_START_OFF);
33 	writel_relaxed(0, ddata.base + LPC_LPT_MSB_OFF);
34 	writel_relaxed(0, ddata.base + LPC_LPT_LSB_OFF);
35 	writel_relaxed(1, ddata.base + LPC_LPT_START_OFF);
40 	return (u64)readl_relaxed(ddata.base + LPC_LPT_LSB_OFF);
50 	rate = clk_get_rate(ddata.clk);
54 	ret = clocksource_mmio_init(ddata.base + LPC_LPT_LSB_OFF,
86 	ddata.clk = clk;
106 	ddata.base = of_iomap(np, 0);
107 	if (!ddata.base) {
114 		iounmap(ddata.base);
120 		clk_disable_unprepare(ddata.clk);
121 		clk_put(ddata.clk);
122 		iounmap(ddata.base);
127 		clk_get_rate(ddata.clk));
131 TIMER_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);