Lines Matching refs:div

26 	for (clkt = table; clkt->div; clkt++)
28 return clkt->div;
41 for (clkt = divider->table; clkt->div; clkt++)
72 unsigned int div)
76 for (clkt = table; clkt->div; clkt++)
77 if (clkt->div == div)
82 static unsigned int _get_val(struct clk_omap_divider *divider, u8 div)
85 return div;
87 return __ffs(div);
89 return _get_table_val(divider->table, div);
90 return div - 1;
97 unsigned int div, val;
102 div = _get_div(divider, val);
103 if (!div) {
110 return DIV_ROUND_UP(parent_rate, div);
120 unsigned int div)
124 for (clkt = table; clkt->div; clkt++)
125 if (clkt->div == div)
130 static bool _is_valid_div(struct clk_omap_divider *divider, unsigned int div)
133 return is_power_of_2(div);
135 return _is_valid_table_div(divider->table, div);
144 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
146 for (clkt = table; clkt->div; clkt++) {
147 if (clkt->div == div)
148 return clkt->div;
149 else if (clkt->div < div)
152 if ((clkt->div - div) < (up - div))
153 up = clkt->div;
229 int div;
230 div = ti_clk_divider_bestdiv(hw, rate, prate);
232 return DIV_ROUND_UP(*prate, div);
239 unsigned int div, value;
247 div = DIV_ROUND_UP(parent_rate, rate);
249 if (div > divider->max)
250 div = divider->max;
251 if (div < divider->min)
252 div = divider->min;
254 value = _get_val(divider, div);
310 struct clk_omap_divider *div)
325 div->hw.init = &init;
328 return of_ti_clk_register(node, &div->hw, name);
366 tmp[valid_div].div = div_table[i];
384 struct clk_omap_divider *div)
423 table[valid_div].div = val;
429 div->table = table;
444 if (of_property_read_u32(node, "ti,min-div", &min_div))
447 if (of_property_read_u32(node, "ti,max-div", &max_div)) {
448 pr_err("no max-div for %pOFn!\n", node);
453 for (clkt = divider->table; clkt->div; clkt++) {
454 val = clkt->div;
470 struct clk_omap_divider *div,
476 ret = ti_clk_get_reg_addr(node, 0, &div->reg);
480 div->shift = div->reg.bit;
483 div->latch = val;
485 div->latch = -EINVAL;
488 div->flags = 0;
491 div->flags |= CLK_DIVIDER_ONE_BASED;
494 div->flags |= CLK_DIVIDER_POWER_OF_TWO;
499 ret = ti_clk_get_div_table(node, div);
503 return _populate_divider_min_max(node, div);
507 * of_ti_divider_clk_setup - Setup function for simple div rate clock
516 struct clk_omap_divider *div;
518 div = kzalloc(sizeof(*div), GFP_KERNEL);
519 if (!div)
522 if (ti_clk_divider_populate(node, div, &flags))
525 clk = _register_divider(node, flags, div);
533 kfree(div->table);
534 kfree(div);
540 struct clk_omap_divider *div;
543 div = kzalloc(sizeof(*div), GFP_KERNEL);
544 if (!div)
547 if (ti_clk_divider_populate(node, div, &tmp))
550 if (!ti_clk_add_component(node, &div->hw, CLK_COMPONENT_TYPE_DIVIDER))
554 kfree(div->table);
555 kfree(div);