Lines Matching refs:con_id
2561 { .con_id = "clk_m", .dt_id = TEGRA210_CLK_CLK_M },
2562 { .con_id = "pll_ref", .dt_id = TEGRA210_CLK_PLL_REF },
2563 { .con_id = "clk_32k", .dt_id = TEGRA210_CLK_CLK_32K },
2564 { .con_id = "osc", .dt_id = TEGRA210_CLK_OSC },
2565 { .con_id = "osc_div2", .dt_id = TEGRA210_CLK_OSC_DIV2 },
2566 { .con_id = "osc_div4", .dt_id = TEGRA210_CLK_OSC_DIV4 },
2567 { .con_id = "pll_c", .dt_id = TEGRA210_CLK_PLL_C },
2568 { .con_id = "pll_c_out1", .dt_id = TEGRA210_CLK_PLL_C_OUT1 },
2569 { .con_id = "pll_c2", .dt_id = TEGRA210_CLK_PLL_C2 },
2570 { .con_id = "pll_c3", .dt_id = TEGRA210_CLK_PLL_C3 },
2571 { .con_id = "pll_p", .dt_id = TEGRA210_CLK_PLL_P },
2572 { .con_id = "pll_p_out1", .dt_id = TEGRA210_CLK_PLL_P_OUT1 },
2573 { .con_id = "pll_p_out2", .dt_id = TEGRA210_CLK_PLL_P_OUT2 },
2574 { .con_id = "pll_p_out3", .dt_id = TEGRA210_CLK_PLL_P_OUT3 },
2575 { .con_id = "pll_p_out4", .dt_id = TEGRA210_CLK_PLL_P_OUT4 },
2576 { .con_id = "pll_m", .dt_id = TEGRA210_CLK_PLL_M },
2577 { .con_id = "pll_x", .dt_id = TEGRA210_CLK_PLL_X },
2578 { .con_id = "pll_x_out0", .dt_id = TEGRA210_CLK_PLL_X_OUT0 },
2579 { .con_id = "pll_u", .dt_id = TEGRA210_CLK_PLL_U },
2580 { .con_id = "pll_u_out", .dt_id = TEGRA210_CLK_PLL_U_OUT },
2581 { .con_id = "pll_u_out1", .dt_id = TEGRA210_CLK_PLL_U_OUT1 },
2582 { .con_id = "pll_u_out2", .dt_id = TEGRA210_CLK_PLL_U_OUT2 },
2583 { .con_id = "pll_u_480M", .dt_id = TEGRA210_CLK_PLL_U_480M },
2584 { .con_id = "pll_u_60M", .dt_id = TEGRA210_CLK_PLL_U_60M },
2585 { .con_id = "pll_u_48M", .dt_id = TEGRA210_CLK_PLL_U_48M },
2586 { .con_id = "pll_d", .dt_id = TEGRA210_CLK_PLL_D },
2587 { .con_id = "pll_d_out0", .dt_id = TEGRA210_CLK_PLL_D_OUT0 },
2588 { .con_id = "pll_d2", .dt_id = TEGRA210_CLK_PLL_D2 },
2589 { .con_id = "pll_d2_out0", .dt_id = TEGRA210_CLK_PLL_D2_OUT0 },
2590 { .con_id = "pll_a", .dt_id = TEGRA210_CLK_PLL_A },
2591 { .con_id = "pll_a_out0", .dt_id = TEGRA210_CLK_PLL_A_OUT0 },
2592 { .con_id = "pll_re_vco", .dt_id = TEGRA210_CLK_PLL_RE_VCO },
2593 { .con_id = "pll_re_out", .dt_id = TEGRA210_CLK_PLL_RE_OUT },
2594 { .con_id = "spdif_in_sync", .dt_id = TEGRA210_CLK_SPDIF_IN_SYNC },
2595 { .con_id = "i2s0_sync", .dt_id = TEGRA210_CLK_I2S0_SYNC },
2596 { .con_id = "i2s1_sync", .dt_id = TEGRA210_CLK_I2S1_SYNC },
2597 { .con_id = "i2s2_sync", .dt_id = TEGRA210_CLK_I2S2_SYNC },
2598 { .con_id = "i2s3_sync", .dt_id = TEGRA210_CLK_I2S3_SYNC },
2599 { .con_id = "i2s4_sync", .dt_id = TEGRA210_CLK_I2S4_SYNC },
2600 { .con_id = "vimclk_sync", .dt_id = TEGRA210_CLK_VIMCLK_SYNC },
2601 { .con_id = "audio0", .dt_id = TEGRA210_CLK_AUDIO0 },
2602 { .con_id = "audio1", .dt_id = TEGRA210_CLK_AUDIO1 },
2603 { .con_id = "audio2", .dt_id = TEGRA210_CLK_AUDIO2 },
2604 { .con_id = "audio3", .dt_id = TEGRA210_CLK_AUDIO3 },
2605 { .con_id = "audio4", .dt_id = TEGRA210_CLK_AUDIO4 },
2606 { .con_id = "spdif", .dt_id = TEGRA210_CLK_SPDIF },
2607 { .con_id = "spdif_2x", .dt_id = TEGRA210_CLK_SPDIF_2X },
2608 { .con_id = "extern1", .dt_id = TEGRA210_CLK_EXTERN1 },
2609 { .con_id = "extern2", .dt_id = TEGRA210_CLK_EXTERN2 },
2610 { .con_id = "extern3", .dt_id = TEGRA210_CLK_EXTERN3 },
2611 { .con_id = "cclk_g", .dt_id = TEGRA210_CLK_CCLK_G },
2612 { .con_id = "cclk_lp", .dt_id = TEGRA210_CLK_CCLK_LP },
2613 { .con_id = "sclk", .dt_id = TEGRA210_CLK_SCLK },
2614 { .con_id = "hclk", .dt_id = TEGRA210_CLK_HCLK },
2615 { .con_id = "pclk", .dt_id = TEGRA210_CLK_PCLK },
2616 { .con_id = "fuse", .dt_id = TEGRA210_CLK_FUSE },
2619 { .con_id = "pll_c4_out0", .dt_id = TEGRA210_CLK_PLL_C4_OUT0 },
2620 { .con_id = "pll_c4_out1", .dt_id = TEGRA210_CLK_PLL_C4_OUT1 },
2621 { .con_id = "pll_c4_out2", .dt_id = TEGRA210_CLK_PLL_C4_OUT2 },
2622 { .con_id = "pll_c4_out3", .dt_id = TEGRA210_CLK_PLL_C4_OUT3 },
2623 { .con_id = "dpaux", .dt_id = TEGRA210_CLK_DPAUX },